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BS IEC 60747-9:2019

BS IEC 60747-9:2019

$215.11

Semiconductor devices – Discrete devices. Insulated-gate bipolar transistors (IGBTs)

Published By Publication Date Number of Pages
BSI 2019 82
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This part of IEC 60747 specifies product specific standards for terminology, letter symbols, essential ratings and characteristics, verification of ratings and methods of measurement for insulated-gate bipolar transistors (IGBTs).

PDF Catalog

PDF Pages PDF Title
2 undefined
4 English
CONTENTS
9 FOREWORD
11 1 Scope
2 Normative references
3 Terms and definitions
3.1 General terms
12 3.2 Terms related to ratings and characteristics, voltages and currents
15 3.3 Terms related to ratings and characteristics
17 4 Letter symbols
4.1 General
18 4.2 Graphical symbols
4.3 Additional general subscripts
4.4 List of letter symbols
4.4.1 Voltages
Figures
Figure 1 – Graphical symbols
19 4.4.2 Currents
4.4.3 Other electrical magnitudes
20 4.4.4 Time
4.4.5 Thermal magnitudes
5 Essential ratings and characteristics
5.1 General
5.2 Ratings (limiting values)
5.2.1 General
5.2.2 Ambient or case or virtual junction operating temperature (Ta or Tc or Tvj)
5.2.3 Storage temperature (Tstg)
5.2.4 Collector-emitter voltage with gate-emitter short-circuited (VCES)
21 5.2.5 Gate-emitter voltage with collector-emitter short-circuit (VGES)
5.2.6 Continuous (direct) reverse voltage of a reverse-blocking IGBT (VR*)
5.2.7 Continuous (direct) collector current (IC)
5.2.8 Repetitive peak collector current (ICRM)
5.2.9 Non-repetitive peak collector current (ICSM)
5.2.10 Continuous (direct) reverse-conducting current of a reverse-conducting IGBT (IRC)
5.2.11 Repetitive peak reverse-conducting current of a reverse-conducting IGBT (IRCRM)
5.2.12 Non-repetitive peak reverse-conducting current of a reverse-conducting IGBT (IRCSM)
5.2.13 Total power dissipation (Ptot)
5.2.14 Maximum forward biased safe operating area (FBSOA) (where appropriate)
5.2.15 Maximum reverse biased safe operating area (RBSOA)
22 5.2.16 Maximum short-circuit safe operating area (SCSOA)
5.2.17 Maximum terminal current (ItRMS) (where appropriate)
5.2.18 Mounting force (F)
5.2.19 Mounting torque (M)
5.3 Characteristics
5.3.2 Collector-emitter breakdown voltage (V(BR)CES) (where appropriate)
5.3.3 Collector-emitter sustaining voltage (VCE*sus) (where appropriate)
5.3.4 Collector-emitter saturation voltage (VCEsat)
5.3.5 Gate-emitter threshold voltage (VGE(th))
5.3.6 Reverse-conducting voltage of a reverse-conducting IGBT (VRC)
5.3.7 Collector-emitter cut-off current (ICE*)
5.3.8 Gate leakage current (IGES)
23 5.3.9 Reverse current of a reverse-blocking IGBT (IR*)
5.3.10 Capacitances
5.3.11 Gate charge (QG)
5.3.12 Internal gate resistance (rg)
5.3.13 Switching characteristics
24 5.3.14 Thermal resistance junction to case (Rth(j-c))
5.3.15 Thermal resistance junction to ambient (Rth(j-a))
5.3.16 Transient thermal impedance junction to case (Zth(j-c))
25 5.3.17 Transient thermal impedance junction to ambient (Zth(j-a))
6 Measuring methods
6.1 General
6.2 Verification of ratings (limiting values)
6.2.1 General
6.2.2 Collector-emitter voltages (VCES, VCER, VCEX)
Tables
Table 1 – Acceptance defining characteristics
26 6.2.3 Reverse voltage of a reverse-blocking IGBT (VRS, VRX)
Figure 2 – Circuit for testing the collector-emitter voltages VCES, VCER, VCEX
27 6.2.4 Gate-emitter voltage with collector-emitter short-circuit (±VGES)
Figure 3 – Circuit for testing the reverse voltages VRS, VRX
28 6.2.5 Continuous (direct) collector current (IC)
Figure 4 – Circuit for testing the gate-emitter voltage ±VGES
29 6.2.6 Maximum peak collector current (ICRM and ICSM)
Figure 5 – Circuit for testing collector current
30 6.2.7 Continuous (direct) reverse-conducting current of a reverse-conducing IGBT (IRC)
Figure 6 – Circuit for testing peak collector current
Figure 7 – Circuit for testing reverse-conducting current
31 6.2.8 Maximum peak reverse-conducting current of a reverse-conducting IGBT (IRCRM and IRCSM)
Figure 8 – Circuit for testing peak reverse-conducting current
32 6.2.9 Maximum reverse biased safe operating area (RBSOA)
Figure 9 – Circuit for testing reverse biased safe operating area (RBSOA)
33 Figure 10 – Waveforms of gate-emitter voltage VGE and collector current IC during turn-off
34 6.2.10 Maximum short-circuit safe operating area (SCSOA)
Figure 11 – Circuit for testing safe operating pulse width at load short-circuit (SCSOA1)
Figure 12 – Waveforms of gate-emitter voltage VGE, collector current IC and collector-emitter voltage VCE during load short-circuit condition SCSOA1
35 Figure 13 – Circuit for testing short-circuit safe operating area 2 (SCSOA2)
36 Figure 14 – Waveforms during SCSOA2
37 6.3 Methods of measurement
6.3.1 Collector-emitter saturation voltage (VCEsat)
Figure 15 – Circuit for measuring the collector-emitter saturation voltage VCEsat
38 6.3.2 Gate-emitter threshold voltage (VGE(th))
6.3.3 Reverse-conducting voltage of a reverse-conducting IGBT (VRC)
Figure 16 – Circuit for measuring the gate-emitter threshold voltage
39 6.3.4 Collector cut-off current (ICES, ICER, ICEX)
Figure 17 – Circuit for measuring the reverse-conducting voltage VRC
40 6.3.5 Gate leakage current (IGES)
Figure 18 – Circuit for measuring the collector cut-off current
41 6.3.6 Reverse current of a reverse-blocking IGBT (IRS, IRX)
Figure 19 – Circuit for measuring the gate leakage current
42 6.3.7 Input capacitance (Cies)
Figure 20 – Circuit for measuring the reverse current
43 6.3.8 Output capacitance (Coes)
Figure 21 – Circuit for measuring the input capacitance
44 Figure 22 – Circuit for measuring the output capacitance
45 6.3.9 Reverse transfer capacitance (Cres)
6.3.10 Gate charge (QG)
Figure 23 – Circuit for measuring the reverse transfer capacitance
46 Figure 24 – Circuit for measuring the gate charge
Figure 25 – Basic gate charge waveform
47 6.3.11 Internal gate resistance (rg)
Figure 26 – Circuit for measuring the internal gate resistance
48 6.3.12 Turn-on times (td(on), tr, ton) and turn-on energy (Eon)
Figure 27 – Circuit for measuring turn-on times and energy
49 Figure 28 – Waveforms during turn-on times
50 6.3.13 Turn-off times (td(off), tf, toff, tz) and turn-off energy (Eoff)
Figure 29 – Circuit for measuring turn-off times and energy
Figure 30 – Waveforms during turn-off times
51 6.3.14 Peak reverse recovery current (Irrm), reverse recovery time (trr), reverse recovery energy (Err) and reverse recovered charge (Qrr) of a reverse-blocking IGBT
52 Figure 31 – Circuit for measuring reverse recovery characteristics
Figure 32 – Waveforms during reverse recovery
54 6.3.15 Peak forward recovery current (Ifrm), forward recovery time (tfr), forward recovery energy (Efr) and forward recovered charge (Qfr) of a reverse-conducting IGBT
Figure 33 – Circuit for measuring forward recovery characteristics
55 Figure 34 – Waveforms during forward recovery
56 6.3.16 Thermal resistance junction to case (Rth(j-c)) and transient thermal impedance junction to case (Zth(j-c))
57 Figure 35 – Circuit for measuring the variation with temperature of the collector-emitter voltage VCE at a low measuring current IC1 and for heating up the IGBT by a high current IC2
58 Figure 36 – Typical variation of the collector-emitter voltage VCE at a low measuring current IC1 with the case temperature Tc (when heated from outside, i.e. Tc = Tvj)
59 Figure 37 – IC, VCE and Tc with time
60 Figure 38 – Circuit for measuring thermal resistanceand transient thermal impedance: Method 2
61 Figure 39 – Typical variation of the gate-emitter threshold voltage VGE(th)at a low measuring current IC1 with the case temperature Tc(when heated from the outside, i.e. Tc = Tvj)
62 7 Acceptance and reliability
7.1 General requirements
7.2 Specific requirements
7.2.1 List of endurance and reliability tests
7.2.2 Conditions for endurance and reliability tests
7.2.3 Acceptance-defining characteristics and criteria for endurance and reliability tests
Figure 40 – IC, VGE and Tc with time
63 7.2.4 Procedure in case of a testing error
7.2.5 Endurance and reliability tests and test methods
Table 2 – Acceptance-defining characteristics for endurance and reliability tests
64 Figure 41 – Circuit for high-temperature blockings
65 Figure 42 – Circuit for high-temperature gate bias
66 7.3 Type tests and routine tests
7.3.1 Type tests
Figure 43 – Circuit for intermittent operating life
Figure 44 – Expected number of cycles versus temperature rise (Tvj
67 7.3.2 Routine tests
Table 3 – Minimum type and routine tests for IGBTs when applicable
68 Annexes
Annex A (normative) Measuring method for collector-emitter breakdown voltage
A.1 General
A.2 Purpose
A.3 Circuit diagram
A.4 Measurement procedure
Figure A.1 – Circuit for measuring the collector-emitter breakdown voltage
69 A.5 Specified conditions
70 Annex B (normative) Measuring method for collector-emitter sustaining voltage
B.1 General
B.2 Purpose
B.3 Circuit diagram
B.4 Circuit description and requirements
Figure B.1 – Circuit for measuring the collector-emitter sustaining voltage VCE*sus
71 B.5 Measurement procedure
B.6 Precautions to be observed
B.7 Requirements
Figure B.2 – Operating locus of the collector current
72 B.8 Specified conditions
73 Annex C (normative) Measuring method for inductive load turn-off current under specified conditions
C.1 General
C.2 Purpose
C.3 Circuit diagram and waveforms
Figure C.1 – Circuit for measuring inductive load turn-off current
74 C.4 Circuit description and requirements
C.5 Measurement procedure
C.6 Specified conditions
Figure C.2 – Waveforms of collector current IC and collector voltage VCE during turn-off
75 Annex D (normative) Forward biased safe operating area (FBSOA)
D.1 General
D.2 Purpose
D.3 Method 1
D.3.1 General
D.3.2 Circuit diagram
Figure D.1 – Circuit for testing forward biased safe operating area (method 1)
76 D.3.3 Test procedure
Figure D.2 – Typical VCE versus collector-emitter voltage VCE characteristics
77 D.3.4 Specified conditions
D.4 Method 2
D.4.1 General
D.4.2 Circuit diagram
Figure D.3 – Typical forward biased safe operating area
78 D.4.3 Test procedure and precautions to be taken
Figure D.4 – Circuit for testing forward biased safe operating area (method 2)
Figure D.5 – Latching modeoperation waveforms
Figure D.6 – Latching mode I-V characteristics
79 D.4.4 Specified conditions
80 Bibliography

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BS IEC 60747-9:2019
$215.11