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BS ISO 20794-7:2020

BS ISO 20794-7:2020

$215.11

Road vehicles. Clock extension peripheral interface (CXPI) – Data link and physical layer conformance test plan

Published By Publication Date Number of Pages
BSI 2020 144
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This document specifies the conformance test plans for the CXPI data link layer and the CXPI physical layer. It also specifies the conformance test plan for error detection.

Additionally, this document describes the concept of conformance test plan operation.

PDF Catalog

PDF Pages PDF Title
2 undefined
8 Foreword
9 Introduction
11 1 Scope
2 Normative references
3 Terms and definitions
4 Symbols and abbreviated terms
4.1 Symbols
12 4.2 Abbreviated terms
13 5 Conventions
6 General test specification considerations
6.1 General
14 6.2 Test conditions
6.3 IUT requirements
6.4 CTC definition
15 6.5 Test system set-up
16 6.6 Configuration of test system and IUT
6.6.1 General
17 6.6.2 IUT-specific set-up parameters
18 6.6.3 Default configurations
6.6.4 L_ErrDet1 configurations
6.6.5 L_ErrDet2 configurations
6.6.6 L_Arbit configurations
6.6.7 L_Unknown configurations
6.7 SUT initialisation
19 6.8 Additional test system set-up capabilities
6.8.1 CXPI network data generator
21 6.8.2 TXD data generator
23 6.8.3 TXPWM data generator
24 6.8.4 RXPWM data generator
26 6.8.5 Other requirements
7 Data link layer conformance test plan
7.1 General
7.2 CTP – Timing parameters
7.2.1 2.CTC_1.1 – IBS length
27 7.2.2 2.CTC_1.2 – IFS length
28 7.2.3 2.CTC_1.3 – Frame reception starting condition 1 without the error bit
7.2.4 2.CTC_1.4 – Frame reception starting condition 1 with the error bit
29 7.2.5 2.CTC_1.5 – Frame reception starting condition 2 without the error bit
30 7.2.6 2.CTC_1.6 – Frame reception starting condition 2 with the error bit
7.2.7 2.CTC_1.7 – Frame reception starting condition 3
31 7.2.8 2.CTC_1.8 – Maximum length of the frame
32 7.3 CTP – Frame transmission/reception
7.3.1 2.CTC_2.1 – Response to L_PID field
33 7.3.2 2.CTC_2.2 – L_PID field transmission
7.3.3 2.CTC_2.3 – L_PTYPE field transmission
34 7.3.4 2.CTC_2.4 – L_PTYPE field response function
35 7.3.5 2.CTC_2.5 – L_FI_DLC ≠ 11112 and frame data verification 1
36 7.3.6 2.CTC_2.6 – L_FI_DLC ≠ 11112 and frame data verification 2 if DLC is 11012 or 11102 (Ftype = NormalCom)
37 7.3.7 2.CTC_2.7 – L_FI_DLC = 11112/L_FI_DLCext ≥ 0 and frame data verification
38 7.3.8 2.CTC_2.8 – Given CRC of frame with L_FI_DLC ≠ 11112
39 7.3.9 2.CTC_2.9 – Given CRC of frame with L_FI_DLC = 11112/L_FI_DLCext ≥ 0
40 7.3.10 2.CTC_2.10 – Frame transmission completion
7.3.11 2.CTC_2.11 – Frame reception completion
41 7.4 CTP – Network access
7.4.1 2.CTC_3.1 – Arbitration function 1 (arbitration by using carrier sense)
42 7.4.2 2.CTC_3.2 – Arbitration function 2 (IUT loses arbitration and transitions into receiving state)
43 7.5 CTP – Error detection
7.5.1 2.CTC_4.1 – Byte error
45 7.5.2 2.CTC_4.2 – CRC error
46 7.5.3 2.CTC_4.3 – Parity error of the L_PID field without the error bit
47 7.5.4 2.CTC_4.4 – Parity error of the L_PID field with the error bit
7.5.5 2.CTC_4.5 – Parity error of the L_PTYPE field without the error bit
48 7.5.6 2.CTC_4.6 – Parity error of the L_PTYPE field with the error bit
49 7.5.7 2.CTC_4.7 – Data length code error with L_FI_DLC ≠ 11112
50 7.5.8 2.CTC_4.8 – Data length error with L_FI_DLC = 11112/L_FI_DLCext ≥ 0
51 7.5.9 2.CTC_4.9 – Data length code error L_FI_DLC ≠ 11112 and if DLC is 11012 or 11102 (Ftype = DiagNodeCfg)
52 7.5.10 2.CTC_4.10 – Data length code error L_FI_DLC = 11112/L_FI_DLCext ≤ 12 (Ftype = DiagNodeCfg)
53 7.5.11 2.CTC_4.11 – Framing error in receiving node
54 7.5.12 2.CTC_4.12 – Framing error in transmitting node
7.5.13 2.CTC_4.13 – Ignore error (no support of L_FI_DLC = 11112)
55 8 Physical layer conformance test plan (PMA – PS separate type)
8.1 CTP – Operational conditions and calibration
8.1.1 Initial configuration
56 8.1.2 1.CTC_1.1 – Clock transmission 1
57 8.1.3 1.CTC_1.2 – Clock transmission 2
59 8.1.4 1.CTC_1.3 – Clock transmission 3
61 8.1.5 1.CTC_1.4 – Detection of clock existence
62 8.1.6 1.CTC_1.5 – Arbitration function (stop transmission by arbitration)
64 8.1.7 1.CTC_1.6 – Operating voltage range
65 8.1.8 1.CTC_1.7 – Bit synchronisation
67 8.2 CTP – Wake-up pulse
8.2.1 General
8.2.2 1.CTC_2.1 – Wake-up pulse reception 1, IUT as master node
69 8.2.3 1.CTC_2.2 – Wake-up pulse reception 2, IUT as slave node
71 8.2.4 1.CTC_2.3 – Wake-up pulse transmission
73 8.3 CTP – Voltage and duty cycle thresholds
8.3.1 General
8.3.2 Voltage threshold test set-up
8.3.3 1.CTC_3.1 – Voltage threshold test 1
74 8.3.4 1.CTC_3.2 – Voltage threshold (VDom_TS up) test 2
76 8.3.5 1.CTC_3.2 – Voltage threshold test 2
77 8.3.6 1.CTC_3.3 – Duty cycle threshold test 1
78 8.3.7 1.CTC_3.4 – Duty cycle threshold test 2
79 8.4 CTP – Network state current characteristics
8.4.1 1.CTC_4.1 – Drive current test
81 8.4.2 1.CTC_4.2 – Input leakage test
82 8.4.3 1.CTC_4.3 – Reverse leakage current test
83 8.5 CTP – Physical signal slope control
8.5.1 1.CTC_5.1 – Duty cycle measurement 1
85 8.5.2 1.CTC_5.2 – Duty cycle measurement 2
87 8.5.3 1.CTC_5.3 – Duty cycle measurement 3
88 8.5.4 1.CTC_5.4 – Propagation delay of the receiver test
90 8.5.5 1.CTC_5.5 – Propagation delay of the transmitter test
92 8.5.6 1.CTC_5.6 – Propagation delay of the transmitter test 2
94 8.5.7 1.CTC_5.7 – Loop back time test
95 8.6 CTP – GND/VBAT shift test
8.6.1 GND/VBAT shift test set-up
96 8.6.2 1.CTC_6.1 – GND shift test
97 8.6.3 1.CTC_6.2 – VBAT shift test
98 8.7 CTP – Loss of power supply
8.7.1 Loss of battery and Loss of GND test set-up
99 8.7.2 1.CTC_7.1 – Loss of battery test (VBAT)
100 8.7.3 1.CTC_7.2 – Loss of GND test
101 8.8 CTP – Internal static capacity
8.8.1 Internal static capacity test set-up
102 8.8.2 1.CTC_8.1 Internal static capacity
104 8.9 CTP – Internal resistance measurement during operation
8.9.1 Internal resistor measurement test set-up
105 8.9.2 1.CTC_9.1– Internal resistor measurement 1
106 8.9.3 1.CTC_9.2– Internal resistor measurement 2
107 9 Physical layer conformance test plan (PS –PMA non-separate type)
9.1 CTP – Operational conditions and calibration
9.1.1 1.CTC_10.1 – Clock transmission
109 9.1.2 1.CTC_10.2 – Detection of clock existence
110 9.1.3 1.CTC_10.3 – Arbitration function (stop transmission by arbitration)
111 9.1.4 1.CTC_10.4 – Operating voltage range
112 9.2 CTP – Wake-up pulse
9.2.1 General
9.2.2 1.CTC_11.1 – Wake-up pulse reception, IUT as master node
113 9.2.3 1.CTC_11.2 – Wake-up by clock detection
114 9.2.4 1.CTC_11.3 – Wake-up pulse transmission
115 9.3 CTP – Voltage and duty cycle thresholds
9.3.1 General
9.3.2 1.CTC_12.1 – Voltage threshold test 1
117 9.3.3 1.CTC_12.2 – Voltage threshold test 2
118 9.3.4 1.CTC_12.3 – Duty cycle threshold test 1
121 9.3.5 1.CTC_12.4 – Duty cycle threshold test 2
122 9.4 CTP – Network state current characteristics
9.4.1 1.CTC_13.1 – Drive current test
124 9.4.2 1.CTC_13.2 – Input leakage test
125 9.4.3 1.CTC_13.3 – Reverse leakage current test
126 9.5 CTP – Physical signal slope control
9.5.1 1.CTC_14.1 – Duty cycle measurement 1
128 9.5.2 1.CTC_14.2 – Duty cycle measurement 2
130 9.6 CTP – GND/VBAT shift test
9.6.1 GND/VBAT shift test set-up
131 9.6.2 1.CTC_15.1 – GND shift test
132 9.6.3 1.CTC_15.2 – VBAT shift test
133 9.7 CTP – Loss of power supply
9.7.1 General
9.7.2 Loss of battery (VBAT) and GND test set-up
134 9.7.3 1.CTC_16.1 – Loss of battery test (VBAT)
135 9.7.4 1.CTC_16.2 – Loss of GND test
136 9.8 CTP – Internal static capacity
9.8.1 Internal static capacity test set-up
137 9.8.2 1.CTC_17.1 Internal static capacity
139 9.9 CTP – Internal resistance measurement during operation
9.9.1 Internal resistor measurement test set-up
140 9.9.2 1.CTC_18.1– Internal resistor measurement 1
141 9.9.3 1.CTC_18.2– Internal resistor measurement 2
143 Bibliography

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BS ISO 20794-7:2020
$215.11