IEEE 488.1 2003

$162.50

(Replaced)IEEE Standard For Higher Performance Protocol for the Standard Digital Interface for Programmable Instrumentation

Published By	Publication Date	Number of Pages
IEEE	2003	152

Guaranteed Safe Checkout

Category: IEEE

If you have any questions, feel free to reach out to our online customer service team by clicking on the bottom right corner. We’re here to assist you 24/7.
Email:[email protected]

Description

Revision Standard – Active. Replaced by 60488.1: 2004. Supersedes 488.1-1987 This standard applies to interface systems used to interconnect both programmable and nonprogrammable electronic measuring apparatus with other apparatus and accessories necessary to assemble instrumentation systems. It applies to the interface of instrumentation systems, or portions of them, in which the a) Data exchanged among the interconnected apparatus is digital (as distinct from analog); b) Number of devices that may be interconnected by one contiguous bus does not exceed 15; c) Total transmission path lengths over the interconnecting cables does not exceed 20 m; d) Data rate among devices does not exceed 8 000 000 B/s. The basic functional specifications of this standard may be used in digital interface applications that require longer distances, more devices, increased noise immunity, or combinations of these. Different electrical and mechanical specifications may be required (for example, symmetrical circuit configurations, high threshold logic, special connectors, or cable configurations) for these extended applications.

PDF Catalog

PDF Pages	PDF Title
1	IEEE Std 488.1-2003 Cover
2	Title Page
3	Abstract/Keywords
5	Introduction
6	Patents/Intepretations and errata
7	Participants
8	CONTENTS
10	1. Overview 1.1 Scope
11	1.2 Object 1.3 Interface system overview 1.3.1 Interface system objective
12	1.3.2 Fundamental communication capabilities
13	1.3.3 Message paths and bus structure
14	1.3.4 Interface system elements
15	2. References 3. Definitions 3.1 General system terms
16	3.2 Units connected via the interface system 3.3 Signals and paths
17	4. Functional specifications 4.1 Functional partition 4.1.1 Device functions 4.1.2 Interface function concepts 4.1.2.1 Interface functions 4.1.3 Interface function state
18	4.1.3.1 Interface function repertoire 4.1.3.2 Interface function assumptions and perspective
19	4.1.4 Message concepts 4.1.4.1 Message
20	4.1.4.2 Local message route and content 4.1.4.3 Remote message route and content 4.1.4.4 State linkage route and content 4.1.4.5 Message coding 4.1.4.6 Classification of multiline messages
21	4.1.4.7 Message transfer conventions 4.1.4.7.1 Remote message transfer conventions 4.1.4.7.2 Local message transfer conventions 4.2 Notation used to specify interface functions 4.2.1 State diagram notation
23	4.2.2 Message output notation
24	4.3 Source handshake (SH) interface function 4.3.1 General description 4.3.2 SH function state diagram
27	4.3.3 SH function state descriptions 4.3.3.1 Source idle state (SIDS) 4.3.3.2 Source generate state (SGNS)
28	4.3.3.3 Source delay state (SDYS) 4.3.3.4 Source transfer state (STRS)
29	4.3.3.5 Source wait for new cycle state (SWNS) 4.3.3.6 Source idle wait state (SIWS)
30	4.3.3.7 Source wait for RFD state (SWRS) 4.3.3.8 Source RFD delay state (SRDS) 4.3.3.9 Source NIC generate state (SNGS) 4.3.3.10 Source noninterlocked disable state (SNDS).
31	4.3.3.11 Source noninterlocked enable state (SNES) 4.3.4 SH function and SHE function allowable subsets 4.3.5 Additional SH and SHE function requirements and guidelines
32	4.4 Acceptor handshake (AH) and extended acceptor handshake (AHE) interface functions 4.4.1 General description 4.4.2 AH function state diagram
36	4.4.3 AH function state descriptions 4.4.3.1 Acceptor idle state (AIDS) 4.4.3.2 Acceptor not ready state (ANRS)
37	4.4.3.3 Acceptor ready state (ACRS) 4.4.3.4 Accept data state (ACDS) 4.4.3.5 Acceptor wait for new cycle state (AWNS)
38	4.4.3.6 Accept noninterlocked ready state (ANDS) 4.4.3.7 Accept noninterlocked not ready state (ANES) 4.4.3.8 Accept noninterlocked terminate state (ANTS)
39	4.4.3.9 Accept noninterlocked inactive state (ANIS) 4.4.3.10 Accept noninterlocked delay state (ANYS) 4.4.3.11 Accept wait for noninterlocked capable state (AWAS) 4.4.3.12 Accept interlocked always state (AIAS) 4.4.3.13 Accept noninterlocked configured state (ANCS)
40	4.4.3.14 Accept noninterlocked active state (ANAS) 4.4.3.15 Accept leave noninterlocked state (ALNS) 4.4.4 AH function and AHE function allowable subsets 4.4.5 Additional AH and AHE function requirements and guidelines
41	4.5 Talker (T) interface function (Includes serial poll capabilities) 4.5.1 General description
42	4.5.2 T function state diagrams
45	4.5.3 T function state descriptions 4.5.3.1 Talker idle state (TIDS) 4.5.3.2 Talker addressed state (TADS)
46	4.5.3.3 Talker active state (TACS) 4.5.3.4 Serial poll active state (SPAS) 4.5.3.5 Serial poll idle state (SPIS) 4.5.3.6 Serial poll mode state (SPMS)
47	4.5.3.7 Talker primary idle state (TPIS) 4.5.3.8 Talker primary addressed state (TPAS) 4.5.4 T function- and TE function-allowable subsets
49	4.5.5 Additional T and TE interface function requirements and guidelines 4.6 Listener (L) interface function 4.6.1 General description
50	4.6.2 L function state diagram
51	4.6.3 L function state descriptions 4.6.3.1 Listener idle state (LIDS)
52	4.6.3.2 Listener addressed state (LADS)
53	4.6.3.3 Listener active state (LACS) 4.6.3.4 Listener primary idle state (LPIS) 4.6.3.5 Listener primary addressed state (LPAS) 4.6.4 L function and LE function allowable subsets 4.6.5 Additional L or LE requirements and guidelines
55	4.7 Service request (SR) interface function 4.7.1 General description 4.7.2 SR interface function state diagrams 4.7.3 SR state description 4.7.3.1 Negative poll response state (NPRS)
56	4.7.3.2 Service request state (SQRS) 4.7.3.3 Affirmative poll response state (APRS) 4.7.4 SR interface function allowable subsets 4.7.5 Additional SR interface function requirements and guidelines
57	4.8 Remote local (RL) interface function 4.8.1 General description 4.8.2 RL function state diagram
58	4.8.3 RL state descriptions 4.8.3.1 Local state (LOCS) 4.8.3.2 Local with lockout state (LWLS)
59	4.8.3.3 Remote state (REMS) 4.8.3.4 Remote with lockout state (RWLS) 4.8.4 RL function-allowable subsets
60	4.8.5 Additional RL interface function requirements and guidelines 4.9 Parallel poll (PP) interface function 4.9.1 General description
61	4.9.2 PP function state diagram
62	4.9.3 PP state descriptions 4.9.3.1 Parallel poll idle state (PPIS) 4.9.3.2 Parallel poll standby state (PPSS)
63	4.9.3.3 Parallel poll active state (PPAS) 4.9.3.4 Parallel poll unaddressed to configure state (PUCS) 4.9.3.5 Parallel poll addressed to configure state (PACS)
64	4.9.4 PP interface function-allowable subsets 4.9.5 Additional PP interface function requirements and guidelines 4.10 Device clear (DC) interface function 4.10.1 General description 4.10.2 DC function state diagram
65	4.10.3 DC function state descriptions 4.10.3.1 Device clear idle state (DCIS)
66	4.10.3.2 Device clear active state (DCAS) 4.10.4 DC interface function-allowable subsets 4.10.5 Additional DC function requirements and guidelines 4.11 Device trigger (DT) interface function 4.11.1 General description 4.11.2 DT function state diagram
67	4.11.3 DT function state descriptions 4.11.3.1 Device trigger idle state (DTIS) 4.11.3.2 Device trigger active state (DTAS)
68	4.11.4 DT interface-allowable subsets 4.11.5 Additional DT function requirements and guidelines 4.12 Controller (C) interface function 4.12.1 General description
69	4.12.2 C function state diagram
72	4.12.3 C state descriptions 4.12.3.1 Controller idle state (CIDS)
73	4.12.3.2 Controller addressed state (CADS) 4.12.3.3 Controller active state (CACS)
74	4.12.3.4 Controller parallel poll wait state (CPWS) 4.12.3.5 Controller parallel poll state (CPPS) 4.12.3.6 Controller standby state (CSBS) 4.12.3.7 Controller synchronous wait state (CSWS)
75	4.12.3.8 Controller active wait state (CAWS) 4.12.3.9 Controller transfer state (CTRS) 4.12.3.10 Controller service requested state (CSRS) 4.12.3.11 Controller service not requested state (CSNS)
76	4.12.3.12 System control not active state (SNAS) 4.12.3.13 System control active state (SACS) 4.12.3.14 System control interface clear idle state (SIIS) 4.12.3.15 System control interface clear not active state (SINS) 4.12.3.16 System control interface clear active state (SIAS) 4.12.3.17 System control remote enable idle state (SRIS)
77	4.12.3.18 System control remote enable not active state (SRNS) 4.12.3.19 System control remote enable active state (SRAS) 4.12.3.20 Controller standby hold state (CSHS) 4.12.4 C interface function allowable subsets
80	4.12.5 Additional C function requirements and guidelines 4.13 Remote message coding and transfer 4.13.1 Remote message coding 4.13.2 Remote message coding concepts 4.13.3 Remote message transfer
81	4.13.4 Remote message coding table organization and conventions 4.13.5 Remote message coding table perspective 4.13.6 Summary notes and symbols for remote message coding Table 44
85	4.13.7 ISO code representation: message coding guidelines
86	4.13.7.1 Interface messages 4.13.7.2 Device-dependent messages 4.13.8 State transition timing values 4.14 Configuration (CF) interface function 4.14.1 General description 4.14.2 CF function state diagrams
87	4.14.3 CF function state descriptions 4.14.3.1 Noninterlocked configuration idle state (NCIS)
88	4.14.3.2 Noninterlocked configuration active state (NCAS)
89	4.14.3.3 Configure not configured state (CNCS) 4.14.3.4 Configure active state 1 (C01S) 4.14.3.5 Configure active state n (CnS), 2 £ n £ 15
90	4.14.4 CF interface function-allowable subsets
91	5. Electrical specifications 5.1 Application 5.2 Logical and electrical state relationships 5.3 Driver requirements 5.3.1 Driver types
92	5.3.2 Driver specifications 5.4 Receiver requirements 5.4.1 Receiver specifications, allowed 5.4.2 Receiver specifications, preferred 5.5 Composite device load requirements 5.5.1 Resistive termination
93	5.5.2 Negative voltage clamping 5.5.3 DC load requirements
94	5.5.4 Capacity load limit 5.5.5 Typical circuit configuration 5.6 Ground requirements
95	5.7 Cable characteristics 5.7.1 Conductor requirements 5.7.2 Cable construction 5.8 State transition timing values
98	6. Mechanical specifications 6.1 Application 6.2 Connector type 6.2.1 Electrical considerations 6.2.2 Mechanical considerations
99	6.2.3 Environmental considerations 6.3 Connector contact assignments
100	6.4 Device connector mounting
101	6.5 Cable assembly
103	7. System applications and guidelines for the designer 7.1 System compatibility 7.2 Data rate consideration 7.2.1 Open collector drivers data rates 7.2.2 Three-state drivers data rates 7.2.3 Higher speed operation
104	7.2.4 Data rate considerations 7.3 Device capabilities 7.3.1 Busy function 7.3.2 NRFD hold
105	7.3.3 RL applications 7.4 AND and OR logic operations
106	7.4.1 RFD and DAC messages 7.4.2 SRQ message 7.4.3 Circuit implementations
107	7.5 Address assignment 7.6 Typical combinations of interface functions
109	7.7 Unimplemented interface message handling
110	8. System requirements and guidelines for the user 8.1 System compatibility 8.2 System installation requirements 8.2.1 Maximum number of devices 8.2.2 Minimum system configurations 8.2.3 System controllers 8.2.4 Devices powered off and on
111	8.3 Address assignment 8.3.1 Primary talk addresses 8.3.2 Primary listen addresses 8.3.3 Secondary addresses
112	8.4 Cabling restrictions 8.4.1 Maximum cable length 8.4.2 Distribution of maximum cable lengths 8.4.3 Cabling configurations 8.5 Operational sequence guidelines
113	8.5.1 Data transfer 8.5.2 Serial poll (issued by controller usually whenever SRQ = 1 on the interface)
114	8.5.3 Control passing 8.5.4 Parallel poll 8.5.4.1 Parallel poll configure 8.5.4.2 Parallel poll response
115	8.5.5 Placing devices in forced remote control 8.5.6 Sending interface clear
116	Annex A (informative) Typical instrument system A.1 Event sequence 1 (device-dependent data returned to processor)
117	A.2 Event sequence 2 (device-dependent data directed to digital printer)
118	Annex B (informative) Handshake process timing sequence B.1 General comments
120	B.2 List of events for interlocked handshake process B.3 List of events for noninterlocked handshake process (Figure B.3)
123	B.4 List of events for holdoff case
124	Annex C (informative) Interface function-allowable subsets C.1 General comments C.2 Capability identification codes
125	C.3 SH function-allowable subsets C.4 AH function-allowable subsets
126	C.5 T function-allowable subsets
127	C.6 T function (with address extension)-allowable subsets
128	C.7 L function-allowable subsets C.8 L function (with address extension)-allowable subsets
129	C.9 SR function-allowable subsets C.10 RL function-allowable subsets C.11 PP function-allowable subsets
130	C.12 DC function-allowable subsets C.13 DT function-allowable subsets
131	C.14 C function-allowable subsets
133	C.15 SHE function-allowable subsets C.16 AHE function-allowable subsets C.17 CF function-allowable subsets
134	Annex D (informative) Interface message reference list
138	Annex E (informative) Multiline interface messages: ISO code representation
139	Annex F (informative) Logic circuit implementation F.1 Implementing states that require no memory F.2 Implementing states that require memory
142	Annex H (informative) Description of interface parameters on data sheets H.1 General H.2 Description of interface function capabilities H.3 Electrical driver/receiver capabilities
143	H.4 Additional information of value to systems users and designers H.4.1 Functional specifications
144	H.4.2 Controls, connectors, and indicators H.4.3 Power up/down sequences and default values H.4.4 Programmable device functions H.4.5 Status handling information H.5 Description of typical time-related values H.5.1 Data rates for DAB messages
145	H.5.2 Other possible time-related values
147	Annex J (informative) Address switch labeling and interface status indicators J.1 General comments J.2 Talk and listen addresses J.3 DIP switch
148	J.4 Alternative implementations J.5 Device status indicators
150	Annex K (informative) Recommended methods for reducing the effects of radiated and conducted interference for devices specified in this standard K.1 Reducing the effect of radiated interference
151	K.1.1 Screened cables K.1.2 RF connection techniques K.1.3 Connector housing

Additional information

Standard Title	(Replaced)IEEE Standard For Higher Performance Protocol for the Standard Digital Interface for Programmable Instrumentation
Published Code	IEEE
Publication Date	2003
Pages Count	152

Preview PDF


PDF Format	Searchable	Printable	Preview Now

IEEE 488.1 2003

PDF Catalog

Related products