{"id":396407,"date":"2024-10-20T04:24:30","date_gmt":"2024-10-20T04:24:30","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-1364-1995\/"},"modified":"2024-10-26T08:11:53","modified_gmt":"2024-10-26T08:11:53","slug":"ieee-1364-1995","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-1364-1995\/","title":{"rendered":"IEEE 1364-1995"},"content":{"rendered":"

New IEEE Standard – Superseded. The Verilog Hardware Description Language (HDL) is defined. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.<\/p>\n

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PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
1<\/td>\nTitle Page <\/td>\n<\/tr>\n
3<\/td>\nIntroduction <\/td>\n<\/tr>\n
5<\/td>\nParticipants <\/td>\n<\/tr>\n
8<\/td>\nCONTENTS <\/td>\n<\/tr>\n
11<\/td>\n1. Overview
1.1 Objectives of this standard
1.2 Conventions used in this standard <\/td>\n<\/tr>\n
12<\/td>\n1.3 Syntactic description <\/td>\n<\/tr>\n
13<\/td>\n1.4 Contents of this standard <\/td>\n<\/tr>\n
14<\/td>\n1.5 Header file listings
1.6 Examples
1.7 Prerequisites <\/td>\n<\/tr>\n
15<\/td>\n2. Lexical conventions
2.1 Lexical tokens
2.2 White space
2.3 Comments
2.4 Operators
2.5 Numbers <\/td>\n<\/tr>\n
19<\/td>\n2.6 Strings <\/td>\n<\/tr>\n
20<\/td>\n2.7 Identifiers, keywords, and system names <\/td>\n<\/tr>\n
23<\/td>\n3. Data types
3.1 Value set
3.2 Nets and registers <\/td>\n<\/tr>\n
25<\/td>\n3.3 Vectors <\/td>\n<\/tr>\n
26<\/td>\n3.4 Strengths
3.5 Implicit declarations
3.6 Net initialization <\/td>\n<\/tr>\n
27<\/td>\n3.7 Net types <\/td>\n<\/tr>\n
32<\/td>\n3.8 Memories <\/td>\n<\/tr>\n
33<\/td>\n3.9 Integers, reals, times, and realtimes <\/td>\n<\/tr>\n
35<\/td>\n3.10 Parameters <\/td>\n<\/tr>\n
36<\/td>\n3.11 Name spaces <\/td>\n<\/tr>\n
37<\/td>\n4. Expressions
4.1 Operators <\/td>\n<\/tr>\n
49<\/td>\n4.2 Operands <\/td>\n<\/tr>\n
52<\/td>\n4.3 Minimum, typical, and maximum delay expressions <\/td>\n<\/tr>\n
53<\/td>\n4.4 Expression bit lengths <\/td>\n<\/tr>\n
55<\/td>\n5. Scheduling semantics
5.1 Execution of a model
5.2 Event simulation <\/td>\n<\/tr>\n
56<\/td>\n5.3 The stratified event queue
5.4 The Verilog simulation reference model <\/td>\n<\/tr>\n
57<\/td>\n5.5 Race conditions <\/td>\n<\/tr>\n
58<\/td>\n5.6 Scheduling implication of assignments <\/td>\n<\/tr>\n
60<\/td>\n6. Assignments
6.1 Continuous assignments <\/td>\n<\/tr>\n
63<\/td>\n6.2 Procedural assignments <\/td>\n<\/tr>\n
65<\/td>\n7. Gate and switch level modeling
7.1 Gate and switch declaration syntax <\/td>\n<\/tr>\n
71<\/td>\n7.2 And, nand, nor, or, xor, and xnor gates <\/td>\n<\/tr>\n
72<\/td>\n7.3 Buf and not gates <\/td>\n<\/tr>\n
73<\/td>\n7.4 Bufif1, bufif0, notif1, and notif0 gates <\/td>\n<\/tr>\n
74<\/td>\n7.5 MOS switches <\/td>\n<\/tr>\n
75<\/td>\n7.6 Bidirectional pass switches <\/td>\n<\/tr>\n
76<\/td>\n7.7 CMOS switches <\/td>\n<\/tr>\n
77<\/td>\n7.8 Pullup and pulldown sources
7.9 Implicit net declarations
7.10 Logic strength modeling <\/td>\n<\/tr>\n
79<\/td>\n7.11 Strengths and values of combined signals <\/td>\n<\/tr>\n
92<\/td>\n7.12 Strength reduction by nonresistive devices
7.13 Strength reduction by resistive devices
7.14 Strengths of net types <\/td>\n<\/tr>\n
93<\/td>\n7.15 Gate and net delays <\/td>\n<\/tr>\n
97<\/td>\n8. User-defined primitives (UDPs)
8.1 UDP definition <\/td>\n<\/tr>\n
100<\/td>\n8.2 Combinational UDPs <\/td>\n<\/tr>\n
101<\/td>\n8.3 Level-sensitive sequential UDPs <\/td>\n<\/tr>\n
102<\/td>\n8.4 Edge-sensitive sequential UDPs <\/td>\n<\/tr>\n
103<\/td>\n8.5 Sequential UDP initialization <\/td>\n<\/tr>\n
105<\/td>\n8.6 UDP instances <\/td>\n<\/tr>\n
106<\/td>\n8.7 Mixing level-sensitive and edge-sensitive descriptions <\/td>\n<\/tr>\n
107<\/td>\n8.8 Level-sensitive dominance <\/td>\n<\/tr>\n
108<\/td>\n9. Behavioral modeling
9.1 Behavioral model overview <\/td>\n<\/tr>\n
109<\/td>\n9.2 Procedural assignments <\/td>\n<\/tr>\n
114<\/td>\n9.3 Procedural continuous assignments <\/td>\n<\/tr>\n
116<\/td>\n9.4 Conditional statement <\/td>\n<\/tr>\n
118<\/td>\n9.5 Case statement <\/td>\n<\/tr>\n
121<\/td>\n9.6 Looping statements <\/td>\n<\/tr>\n
124<\/td>\n9.7 Procedural timing controls <\/td>\n<\/tr>\n
129<\/td>\n9.8 Block statements <\/td>\n<\/tr>\n
133<\/td>\n9.9 Structured procedures <\/td>\n<\/tr>\n
135<\/td>\n10. Tasks and functions
10.1 Distinctions between tasks and functions
10.2 Tasks and task enabling <\/td>\n<\/tr>\n
138<\/td>\n10.3 Functions and function calling <\/td>\n<\/tr>\n
142<\/td>\n11. Disabling of named blocks and tasks <\/td>\n<\/tr>\n
145<\/td>\n12. Hierarchical structures
12.1 Modules <\/td>\n<\/tr>\n
149<\/td>\n12.2 Overriding module parameter value <\/td>\n<\/tr>\n
151<\/td>\n12.3 Ports <\/td>\n<\/tr>\n
156<\/td>\n12.4 Hierarchical names <\/td>\n<\/tr>\n
160<\/td>\n12.5 Scope rules <\/td>\n<\/tr>\n
162<\/td>\n13. Specify blocks
13.1 Specify block declaration <\/td>\n<\/tr>\n
163<\/td>\n13.2 Declaring parameters in specify blocks <\/td>\n<\/tr>\n
164<\/td>\n13.3 Module path declarations <\/td>\n<\/tr>\n
174<\/td>\n13.4 Assigning delays to module paths <\/td>\n<\/tr>\n
177<\/td>\n13.5 Mixing module path delays and distributed delays <\/td>\n<\/tr>\n
178<\/td>\n13.6 Driving wired logic <\/td>\n<\/tr>\n
180<\/td>\n13.7 Controlling pulses on module paths with PATHPULSES <\/td>\n<\/tr>\n
182<\/td>\n14. System tasks and functions <\/td>\n<\/tr>\n
183<\/td>\n14.1 Display system tasks <\/td>\n<\/tr>\n
190<\/td>\n14.2 File input-output system tasks <\/td>\n<\/tr>\n
193<\/td>\n14.3 Timescale system tasks <\/td>\n<\/tr>\n
197<\/td>\n14.4 Simulation control system tasks
14.5 Timing check system tasks <\/td>\n<\/tr>\n
207<\/td>\n14.6 PLA modeling system tasks <\/td>\n<\/tr>\n
210<\/td>\n14.7 Stochastic analysis tasks <\/td>\n<\/tr>\n
212<\/td>\n14.8 Simulation time system functions <\/td>\n<\/tr>\n
214<\/td>\n14.9 Conversion functions for reals <\/td>\n<\/tr>\n
215<\/td>\n14.10 Probabilistic distribution functions <\/td>\n<\/tr>\n
217<\/td>\n15. Value change dump (VCD) file
15.1 Creating the value change dump file <\/td>\n<\/tr>\n
221<\/td>\n15.2 Format of the VCD file <\/td>\n<\/tr>\n
229<\/td>\n16. Compiler directives
16.1 ‘celldefine and ‘endcelldefine
16.2 ‘default_nettype <\/td>\n<\/tr>\n
230<\/td>\n16.3 ‘define and ‘undef <\/td>\n<\/tr>\n
232<\/td>\n16.4 ‘idef, ‘else, ‘endif <\/td>\n<\/tr>\n
234<\/td>\n16.5 ‘include <\/td>\n<\/tr>\n
235<\/td>\n16.6 ‘resetall
16.7 ‘timescale <\/td>\n<\/tr>\n
237<\/td>\n16.8 ‘unconnected_drive and ‘nonunconnected_drive <\/td>\n<\/tr>\n
238<\/td>\n17. PLITF and ACC interface mechanism
17.1 PLI purpose and history <\/td>\n<\/tr>\n
239<\/td>\n17.2 User-defined task or function names
17.3 Overloading built-in system task and function names
17.4 User-supplied PLI applications <\/td>\n<\/tr>\n
240<\/td>\n17.5 Associating PLI applications to a class and system task\/function name <\/td>\n<\/tr>\n
241<\/td>\n17.6 PLI application arguments <\/td>\n<\/tr>\n
242<\/td>\n17.7 User-defined system task and function arguments <\/td>\n<\/tr>\n
243<\/td>\n17.8 PLI include files for TF and ACC routines <\/td>\n<\/tr>\n
244<\/td>\n18. Using ACC routines
18.1 ACC routine definition <\/td>\n<\/tr>\n
245<\/td>\n18.2 The handle data type
18.3 Using ACC routines
18.4 List of ACC routines by major category <\/td>\n<\/tr>\n
252<\/td>\n18.5 Accessible objects <\/td>\n<\/tr>\n
259<\/td>\n18.6 ACC routine types and fulltypes <\/td>\n<\/tr>\n
264<\/td>\n18.7 Error handling <\/td>\n<\/tr>\n
266<\/td>\n18.8 Reading and writing delay values <\/td>\n<\/tr>\n
271<\/td>\n18.9 String handling <\/td>\n<\/tr>\n
273<\/td>\n18.10 Using VCL ACC routines <\/td>\n<\/tr>\n
280<\/td>\n19. ACC routine definitions <\/td>\n<\/tr>\n
281<\/td>\n19.1 acc_append_delays() <\/td>\n<\/tr>\n
285<\/td>\n19.2 acc_append_pulsere() <\/td>\n<\/tr>\n
287<\/td>\n19.3 acc_close() <\/td>\n<\/tr>\n
288<\/td>\n19.4 acc_collect() <\/td>\n<\/tr>\n
290<\/td>\n19.5 acc_compare_handles() <\/td>\n<\/tr>\n
291<\/td>\n19.6 acc_configure() <\/td>\n<\/tr>\n
299<\/td>\n19.7 acc_count() <\/td>\n<\/tr>\n
300<\/td>\n19.8 acc_fetch_argc() <\/td>\n<\/tr>\n
301<\/td>\n19.9 acc_fetch_argv() <\/td>\n<\/tr>\n
302<\/td>\n19.10 acc_fetch_attribute() <\/td>\n<\/tr>\n
306<\/td>\n19.11 acc_fetch_attribute_int() <\/td>\n<\/tr>\n
307<\/td>\n19.12 acc_fetch_attribute_str() <\/td>\n<\/tr>\n
308<\/td>\n19.13 acc_fetch_defname() <\/td>\n<\/tr>\n
309<\/td>\n19.14 acc_fetch_delay_mode() <\/td>\n<\/tr>\n
311<\/td>\n19.15 acc_fetch_delays() <\/td>\n<\/tr>\n
315<\/td>\n19.16 acc_fetch_direction() <\/td>\n<\/tr>\n
316<\/td>\n19.17 acc_fetch_edge() <\/td>\n<\/tr>\n
318<\/td>\n19.18 acc_fetch_fullname() <\/td>\n<\/tr>\n
320<\/td>\n19.19 acc_fetch_fulltype() <\/td>\n<\/tr>\n
323<\/td>\n19.20 acc_fetch_index() <\/td>\n<\/tr>\n
325<\/td>\n19.21 acc_fetch_location() <\/td>\n<\/tr>\n
327<\/td>\n19.22 acc_fetch_name() <\/td>\n<\/tr>\n
329<\/td>\n19.23 acc_fetch_paramtype() <\/td>\n<\/tr>\n
330<\/td>\n19.24 acc_fetch_paramval() <\/td>\n<\/tr>\n
332<\/td>\n19.25 acc_fetch_polarity() <\/td>\n<\/tr>\n
333<\/td>\n19.26 acc_fetch_precision() <\/td>\n<\/tr>\n
334<\/td>\n19.27 acc_fetch_pulsere() <\/td>\n<\/tr>\n
337<\/td>\n19.28 acc_fetch_range() <\/td>\n<\/tr>\n
338<\/td>\n19.29 acc_fetch_size() <\/td>\n<\/tr>\n
339<\/td>\n19.30 acc_fetch_tfarg(), acc_fetch_itfarg() <\/td>\n<\/tr>\n
341<\/td>\n19.31 acc_fetch_tfarg_int(), acc_fetch_itfarg_int() <\/td>\n<\/tr>\n
342<\/td>\n19.32 acc_fetch_tfarg_str(), acc_fetch_itfarg_str() <\/td>\n<\/tr>\n
343<\/td>\n19.33 acc_fetch_timescale_info() <\/td>\n<\/tr>\n
345<\/td>\n19.34 acc_fetch_type() <\/td>\n<\/tr>\n
347<\/td>\n19.35 acc_fetch_type_str() <\/td>\n<\/tr>\n
348<\/td>\n19.36 acc_fetch_value() <\/td>\n<\/tr>\n
353<\/td>\n19.37 acc_free() <\/td>\n<\/tr>\n
354<\/td>\n19.38 acc_handle_by_name() <\/td>\n<\/tr>\n
356<\/td>\n19.39 acc_handle_calling_mod_m() <\/td>\n<\/tr>\n
357<\/td>\n19.40 acc_handle_condition() <\/td>\n<\/tr>\n
358<\/td>\n19.41 acc_handle_conn() <\/td>\n<\/tr>\n
359<\/td>\n19.42 acc_handle_datapath() <\/td>\n<\/tr>\n
360<\/td>\n19.43 acc_handle_hiconn() <\/td>\n<\/tr>\n
362<\/td>\n19.44 acc_handle_interactive_scope() <\/td>\n<\/tr>\n
363<\/td>\n19.45 acc_handle_loconn() <\/td>\n<\/tr>\n
364<\/td>\n19.46 acc_handle_modpath() <\/td>\n<\/tr>\n
366<\/td>\n19.47 acc_handle_notifier() <\/td>\n<\/tr>\n
367<\/td>\n19.48 acc_handle_object() <\/td>\n<\/tr>\n
369<\/td>\n19.49 acc_handle_parent() <\/td>\n<\/tr>\n
370<\/td>\n19.50 acc_handle_path() <\/td>\n<\/tr>\n
371<\/td>\n19.51 acc_handle_pathin() <\/td>\n<\/tr>\n
372<\/td>\n19.52 acc_handle_pathout() <\/td>\n<\/tr>\n
373<\/td>\n19.53 acc_handle_port() <\/td>\n<\/tr>\n
375<\/td>\n19.54 acc_handle_scope() <\/td>\n<\/tr>\n
376<\/td>\n19.55 acc_handle_simulated_net() <\/td>\n<\/tr>\n
378<\/td>\n19.56 acc_handle_tchk() <\/td>\n<\/tr>\n
382<\/td>\n19.57 acc_handle_tchkarg1() <\/td>\n<\/tr>\n
384<\/td>\n19.58 acc_handle_tchkarg2() <\/td>\n<\/tr>\n
385<\/td>\n19.59 acc_handle_terminal() <\/td>\n<\/tr>\n
386<\/td>\n19.60 acc_handle_tfarg(), acc_handle_itfarg() <\/td>\n<\/tr>\n
388<\/td>\n19.61 acc_handle_tfinst() <\/td>\n<\/tr>\n
389<\/td>\n19.62 acc_initialize() <\/td>\n<\/tr>\n
390<\/td>\n19.63 acc_next() <\/td>\n<\/tr>\n
394<\/td>\n19.64 acc_next_bit() <\/td>\n<\/tr>\n
396<\/td>\n19.65 acc_next_cell() <\/td>\n<\/tr>\n
397<\/td>\n19.66 acc_next_cell_load() <\/td>\n<\/tr>\n
399<\/td>\n19.67 acc_next_child() <\/td>\n<\/tr>\n
400<\/td>\n19.68 acc_next_driver() <\/td>\n<\/tr>\n
401<\/td>\n19.69 acc_next_hiconn() <\/td>\n<\/tr>\n
403<\/td>\n19.70 acc_next_input() <\/td>\n<\/tr>\n
405<\/td>\n19.71 acc_next_load() <\/td>\n<\/tr>\n
407<\/td>\n19.72 acc_next_loconn() <\/td>\n<\/tr>\n
408<\/td>\n19.73 acc_next_modpath() <\/td>\n<\/tr>\n
409<\/td>\n19.74 acc_next_net() <\/td>\n<\/tr>\n
410<\/td>\n19.75 acc_next_output() <\/td>\n<\/tr>\n
412<\/td>\n19.76 acc_next_parameter() <\/td>\n<\/tr>\n
413<\/td>\n19.77 acc_next_port() <\/td>\n<\/tr>\n
415<\/td>\n19.78 acc_next_portout() <\/td>\n<\/tr>\n
416<\/td>\n19.79 acc_next_primitive() <\/td>\n<\/tr>\n
417<\/td>\n19.80 acc_next_scope() <\/td>\n<\/tr>\n
418<\/td>\n19.81 acc_next_specparam() <\/td>\n<\/tr>\n
419<\/td>\n19.82 acc_next_tchk() <\/td>\n<\/tr>\n
421<\/td>\n19.83 acc_next_terminal() <\/td>\n<\/tr>\n
422<\/td>\n19.84 acc_next_topmod() <\/td>\n<\/tr>\n
423<\/td>\n19.85 acc_object_in_typelist() <\/td>\n<\/tr>\n
425<\/td>\n19.86 acc_object_of_type() <\/td>\n<\/tr>\n
427<\/td>\n19.87 acc_product_type() <\/td>\n<\/tr>\n
429<\/td>\n19.88 acc_product_version() <\/td>\n<\/tr>\n
430<\/td>\n19.89 acc_release_object() <\/td>\n<\/tr>\n
431<\/td>\n19.90 acc_replace_delays() <\/td>\n<\/tr>\n
435<\/td>\n19.91 acc_replace_pulsere() <\/td>\n<\/tr>\n
438<\/td>\n19.92 acc_reset_buffer() <\/td>\n<\/tr>\n
439<\/td>\n19.93 acc_set_interactive_scope() <\/td>\n<\/tr>\n
440<\/td>\n19.94 acc_set_pulsere() <\/td>\n<\/tr>\n
442<\/td>\n19.95 acc_set_scope() <\/td>\n<\/tr>\n
444<\/td>\n19.96 acc_set_value() <\/td>\n<\/tr>\n
450<\/td>\n19.97 acc_vcl_add() <\/td>\n<\/tr>\n
452<\/td>\n19.98 acc_vcl_delete() <\/td>\n<\/tr>\n
453<\/td>\n19.99 acc_version() <\/td>\n<\/tr>\n
454<\/td>\n20. Using TF routines
20.1 TF routine definition
20.2 TF routine parameters
20.3 Reading and writing parameter values <\/td>\n<\/tr>\n
456<\/td>\n20.4 Value change detection
20.5 Simulation time
20.6 Simulation synchronization <\/td>\n<\/tr>\n
457<\/td>\n20.7 Instances of user-defined task or functions
20.8 Module and scope instance names
20.9 Saving information from one system TF call to the next
20.10 Displaying output messages <\/td>\n<\/tr>\n
458<\/td>\n20.11 Stopping and finishing <\/td>\n<\/tr>\n
459<\/td>\n21. TF routine definitions <\/td>\n<\/tr>\n
460<\/td>\n21.1 io_mcdprintf() <\/td>\n<\/tr>\n
461<\/td>\n21.2 io_printf() <\/td>\n<\/tr>\n
462<\/td>\n21.3 mc_scan_plusargs() <\/td>\n<\/tr>\n
463<\/td>\n21.4 tf_add_long() <\/td>\n<\/tr>\n
464<\/td>\n21.5 tf_asynchoff(), tf_iasynchoff() <\/td>\n<\/tr>\n
465<\/td>\n21.6 tf_asynchon(), tf_iasynchon() <\/td>\n<\/tr>\n
466<\/td>\n21.7 tf_clearalldelays(), tf_iclearalldelays() <\/td>\n<\/tr>\n
467<\/td>\n21.8 tf_compare_long() <\/td>\n<\/tr>\n
468<\/td>\n21.9 tf_copypvc_flag(), tf_icopypvc_flag() <\/td>\n<\/tr>\n
469<\/td>\n21.10 tf_divide_long() <\/td>\n<\/tr>\n
470<\/td>\n21.11 tf_dofinish() <\/td>\n<\/tr>\n
471<\/td>\n21.12 tf_dostop() <\/td>\n<\/tr>\n
472<\/td>\n21.13 tf_error() <\/td>\n<\/tr>\n
473<\/td>\n21.14 tf_evaluatep(), tf_ievaluatep() <\/td>\n<\/tr>\n
474<\/td>\n21.15 tf_exprinfo(), tf_iexprinfo() <\/td>\n<\/tr>\n
477<\/td>\n21.16 tf_getcstringp(), tf_igetcstringp() <\/td>\n<\/tr>\n
478<\/td>\n21.17 tf_getinstance() <\/td>\n<\/tr>\n
479<\/td>\n21.18 tf_getlongp(), tf_igetlongp() <\/td>\n<\/tr>\n
480<\/td>\n21.19 tf_getlongtime(), tf_igetlongtime() <\/td>\n<\/tr>\n
481<\/td>\n21.20 tf_getnextlongtime() <\/td>\n<\/tr>\n
482<\/td>\n21.21 tf_getp(), tf_igetp() <\/td>\n<\/tr>\n
483<\/td>\n21.22 tf_getpchange(), tf_igetpchange() <\/td>\n<\/tr>\n
484<\/td>\n21.23 tf_getrealp(), tf_igetrealp() <\/td>\n<\/tr>\n
485<\/td>\n21.24 tf_getrealtime(), tf_igetrealtime() <\/td>\n<\/tr>\n
486<\/td>\n21.25 tf_gettime(), tf_igettime() <\/td>\n<\/tr>\n
487<\/td>\n21.26 tf_gettimeprecision(), tf_igettimeprecision() <\/td>\n<\/tr>\n
488<\/td>\n21.27 tf_gettimeunit(), tf_igettimeunit() <\/td>\n<\/tr>\n
489<\/td>\n21.28 tf_getworkarea(), tf_igetworkarea() <\/td>\n<\/tr>\n
490<\/td>\n21.29 tf_long_to_real() <\/td>\n<\/tr>\n
491<\/td>\n21.30 tf_longtime_tostr() <\/td>\n<\/tr>\n
492<\/td>\n21.31 tf_message() <\/td>\n<\/tr>\n
494<\/td>\n21.32 tf_mipname(), tf_imipname() <\/td>\n<\/tr>\n
495<\/td>\n21.33 tf_movepvc_flag(), tf_imovepvc_flag() <\/td>\n<\/tr>\n
496<\/td>\n21.34 tf_multiply_long() <\/td>\n<\/tr>\n
497<\/td>\n21.35 tf_nodeinfo(), tf_inodeinfo() <\/td>\n<\/tr>\n
501<\/td>\n21.36 tf_nump(), tf_inump() <\/td>\n<\/tr>\n
502<\/td>\n21.37 tf_propagatep(), tf_ipropagatep() <\/td>\n<\/tr>\n
503<\/td>\n21.38 tf_putlongp(), tf_iputlongp() <\/td>\n<\/tr>\n
504<\/td>\n21.39 tf_putp(), tf_iputp() <\/td>\n<\/tr>\n
505<\/td>\n21.40 tf_putrealp(), tf_iputrealp() <\/td>\n<\/tr>\n
506<\/td>\n21.41 tf_read_restart() <\/td>\n<\/tr>\n
507<\/td>\n21.42 tf_real_to_long() <\/td>\n<\/tr>\n
508<\/td>\n21.43 tf_rosynchronize(), tf_irosynchronize() <\/td>\n<\/tr>\n
509<\/td>\n21.44 tf_scale_longdelay() <\/td>\n<\/tr>\n
510<\/td>\n21.45 tf_scale_realdelay() <\/td>\n<\/tr>\n
511<\/td>\n21.46 tf_setdelay(), tf_isetdelay() <\/td>\n<\/tr>\n
512<\/td>\n21.47 tf_setlongdelay(), tf_isetlongdelay() <\/td>\n<\/tr>\n
513<\/td>\n21.48 tf_setrealdelay(), tf_isetrealdelay() <\/td>\n<\/tr>\n
514<\/td>\n21.49 tf_setworkarea(), tf_isetworkarea() <\/td>\n<\/tr>\n
515<\/td>\n21.50 tf_sizep(), tf_isizep() <\/td>\n<\/tr>\n
516<\/td>\n21.51 tf_spname(), tf_ispname() <\/td>\n<\/tr>\n
517<\/td>\n21.52 tf_strdelputp(), tf_istrdelputp() <\/td>\n<\/tr>\n
519<\/td>\n21.53 tf_strgetp(), tf_istrgetp() <\/td>\n<\/tr>\n
520<\/td>\n21.54 tf_strgettime() <\/td>\n<\/tr>\n
521<\/td>\n21.55 tf_strlongdelputp(), tf_istrlongdelputp() <\/td>\n<\/tr>\n
523<\/td>\n21.56 tf_strrealdelputp(), tf_istrrealdelputp() <\/td>\n<\/tr>\n
525<\/td>\n21.57 tf_subtract_long() <\/td>\n<\/tr>\n
527<\/td>\n21.58 tf_synchronize(), tf_isynchronize() <\/td>\n<\/tr>\n
528<\/td>\n21.59 tf_testpvc_flag(), tf_itestpvc_flag() <\/td>\n<\/tr>\n
529<\/td>\n21.60 tf_text() <\/td>\n<\/tr>\n
530<\/td>\n21.61 tf_typep(), tf_itypep() <\/td>\n<\/tr>\n
531<\/td>\n21.62 tf_unscale_longdelay() <\/td>\n<\/tr>\n
532<\/td>\n21.63 tf_unscale_realdelay() <\/td>\n<\/tr>\n
533<\/td>\n21.64 tf_warning() <\/td>\n<\/tr>\n
534<\/td>\n21.65 tf_write_save() <\/td>\n<\/tr>\n
535<\/td>\n22. Using VPI routines
22.1 The VPI interface <\/td>\n<\/tr>\n
536<\/td>\n22.2 Error handling <\/td>\n<\/tr>\n
537<\/td>\n22.3 List ofVPI routines by functional category <\/td>\n<\/tr>\n
540<\/td>\n22.4 Key to object model diagrams <\/td>\n<\/tr>\n
543<\/td>\n22.5 Object data model diagrams <\/td>\n<\/tr>\n
564<\/td>\n23. VPI routine definitions <\/td>\n<\/tr>\n
565<\/td>\n23.1 vpi_chk_error() <\/td>\n<\/tr>\n
566<\/td>\n23.2 vpi_compare_objects() <\/td>\n<\/tr>\n
567<\/td>\n23.3 vpi_free_object() <\/td>\n<\/tr>\n
568<\/td>\n23.4 vpi_get() <\/td>\n<\/tr>\n
569<\/td>\n23.5 vpi_get_cb_info() <\/td>\n<\/tr>\n
570<\/td>\n23.6 vpi_get_delays() <\/td>\n<\/tr>\n
573<\/td>\n23.7 vpi_get_str() <\/td>\n<\/tr>\n
574<\/td>\n23.8 vpi_get_systf_info() <\/td>\n<\/tr>\n
575<\/td>\n23.9 vpi_get_time() <\/td>\n<\/tr>\n
576<\/td>\n23.10 vpi_get_value() <\/td>\n<\/tr>\n
579<\/td>\n23.11 vpi_get_vlog_info() <\/td>\n<\/tr>\n
580<\/td>\n23.12 vpi_handle() <\/td>\n<\/tr>\n
581<\/td>\n23.13 vpi_handle_by_index() <\/td>\n<\/tr>\n
582<\/td>\n23.14 vpi_handle_by_name() <\/td>\n<\/tr>\n
583<\/td>\n23.15 vpi_handle_multi() <\/td>\n<\/tr>\n
584<\/td>\n23.16 vpi_iterate() <\/td>\n<\/tr>\n
585<\/td>\n23.17 vpi_mcd_close() <\/td>\n<\/tr>\n
586<\/td>\n23.18 vpi_mcd_name() <\/td>\n<\/tr>\n
587<\/td>\n23.19 vpi_mcd_open() <\/td>\n<\/tr>\n
588<\/td>\n23.20 vpi_mcd_printf() <\/td>\n<\/tr>\n
589<\/td>\n23.21 vpi_printf() <\/td>\n<\/tr>\n
590<\/td>\n23.22 vpi_put_delays() <\/td>\n<\/tr>\n
592<\/td>\n23.23 vpi_put_value() <\/td>\n<\/tr>\n
594<\/td>\n23.24 vpi_register_cb() <\/td>\n<\/tr>\n
599<\/td>\n23.25 vpi_register_systf() <\/td>\n<\/tr>\n
602<\/td>\n23.26 vpi_remove_cb() <\/td>\n<\/tr>\n
603<\/td>\n23.27 vpi_scan() <\/td>\n<\/tr>\n
604<\/td>\nAnnex A\u2014Formal syntax definition <\/td>\n<\/tr>\n
614<\/td>\nAnnex B\u2014List of keywords <\/td>\n<\/tr>\n
615<\/td>\nAnnex C\u2014The acc_user.h file <\/td>\n<\/tr>\n
625<\/td>\nAnnex D\u2014The veriuser.h file <\/td>\n<\/tr>\n
632<\/td>\nAnnex E\u2014The vpi_user.h file <\/td>\n<\/tr>\n
645<\/td>\nAnnex F\u2014System tasks and functions <\/td>\n<\/tr>\n
652<\/td>\nAnnex G\u2014Compiler directives <\/td>\n<\/tr>\n
654<\/td>\nAnnex H\u2014Bibliography <\/td>\n<\/tr>\n
655<\/td>\nIndex <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

IEEE Standard Hardware Description Language Based on the Verilog(R) Hardware Description Language<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
IEEE<\/b><\/a><\/td>\n1995<\/td>\n676<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":396410,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2644],"product_tag":[],"class_list":{"0":"post-396407","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-ieee","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/396407","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/396410"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=396407"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=396407"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=396407"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}