{"id":408861,"date":"2024-10-20T05:32:49","date_gmt":"2024-10-20T05:32:49","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-iec-63275-12022\/"},"modified":"2024-10-26T10:08:12","modified_gmt":"2024-10-26T10:08:12","slug":"bs-iec-63275-12022","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-iec-63275-12022\/","title":{"rendered":"BS IEC 63275-1:2022"},"content":{"rendered":"
PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
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2<\/td>\n | undefined <\/td>\n<\/tr>\n | ||||||
4<\/td>\n | English CONTENTS <\/td>\n<\/tr>\n | ||||||
5<\/td>\n | FOREWORD <\/td>\n<\/tr>\n | ||||||
7<\/td>\n | INTRODUCTION <\/td>\n<\/tr>\n | ||||||
8<\/td>\n | 1 Scope 2 Normative references 3 Terms and definitions 4 Requirements 4.1 Sample 4.2 Test temperature 4.3 Test voltage <\/td>\n<\/tr>\n | ||||||
9<\/td>\n | 4.4 Test time 4.5 Measurement temperature 4.6 Failure criteria 4.7 Test circuit 5 Procedures 5.1 Sequence of procedure Figures Figure 1 \u2013 Circuit diagram for bias temperature instability test <\/td>\n<\/tr>\n | ||||||
10<\/td>\n | 5.2 Select sample 5.3 VGS(th) measurement methods Figure 2 \u2013 Test flow chart <\/td>\n<\/tr>\n | ||||||
11<\/td>\n | Figure 3 \u2013 Schematic of test pattern for Example 1 Figure 4 \u2013 IDS versus VGS curve for Example 1 <\/td>\n<\/tr>\n | ||||||
12<\/td>\n | Figure 5 \u2013 Schematic of test pattern for Example 2 and Example 3 Figure 6 \u2013 IDS versus VGS curve for Example 2 Figure 7 \u2013 IDS \u2013 VGS curve for Example 3 <\/td>\n<\/tr>\n | ||||||
13<\/td>\n | 5.4 How to provide a reproducible measurement of VGS(th) 5.5 Initial measurement Figure 8 \u2013 Schematic of test pattern for Example 4 <\/td>\n<\/tr>\n | ||||||
14<\/td>\n | 5.6 Apply voltage and temperature stress 5.7 Remove voltage and temperature stress 5.8 Intermediate measurement 6 Test report <\/td>\n<\/tr>\n | ||||||
15<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Semiconductor devices. Reliability test method for silicon carbide discrete metal-oxide semiconductor field effect transistors – Test method for bias temperature instability<\/b><\/p>\n |