{"id":417265,"date":"2024-10-20T06:15:09","date_gmt":"2024-10-20T06:15:09","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bsi-pd-iec-tr-62878-2-22015-2\/"},"modified":"2024-10-26T11:38:06","modified_gmt":"2024-10-26T11:38:06","slug":"bsi-pd-iec-tr-62878-2-22015-2","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bsi-pd-iec-tr-62878-2-22015-2\/","title":{"rendered":"BSI PD IEC\/TR 62878-2-2:2015"},"content":{"rendered":"
This part of IEC 62878, which is a Technical Report, describes the necessary information on electrical testing for device embedded substrate. This includes the interconnection open- and short-circuit tests as well as the device functional test. It also provides guidelines by demonstrating the electrical test for device embedded substrate.<\/p>\n
This part of IEC 62878 is applicable to device embedded substrates fabricated by use of organic base material, which include for example active or passive devices, discrete components formed in the fabrication process of electronic wiring board, and sheet formed components.<\/p>\n
The IEC 62878 series does not apply to the re-distribution layer (RDL) nor to the electronic modules defined as an M-type business model in IEC 62421.<\/p>\n
PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
---|---|---|---|---|---|---|---|
4<\/td>\n | English CONTENTS <\/td>\n<\/tr>\n | ||||||
5<\/td>\n | FOREWORD <\/td>\n<\/tr>\n | ||||||
7<\/td>\n | INTRODUCTION Figures Figure 1 \u2013 Interconnection open\/short test <\/td>\n<\/tr>\n | ||||||
8<\/td>\n | 1 Scope 2 Electrical tests 2.1 Test level 1A for device embedded substrate <\/td>\n<\/tr>\n | ||||||
9<\/td>\n | 2.2 Test level 1B for component embedded substrate 2.3 Test level 2A for component embedded substrate Figure 2 \u2013 Test level 1A Figure 3 \u2013 Test level 1B <\/td>\n<\/tr>\n | ||||||
10<\/td>\n | Figure 4 \u2013 Test level 2A <\/td>\n<\/tr>\n | ||||||
11<\/td>\n | 2.4 Test level 2B for passive device embedded substrate Figure 5 \u2013 Test level 2B <\/td>\n<\/tr>\n | ||||||
12<\/td>\n | 2.5 Test level 3 for device embedded substrate Figure 6 \u2013 Device embedded substrate with two or more passive devices <\/td>\n<\/tr>\n | ||||||
13<\/td>\n | Figure 7 \u2013 Test level 3 for functional test <\/td>\n<\/tr>\n | ||||||
14<\/td>\n | 3 Electrical test procedure for device embedded substrate Figure 8 \u2013 Circuit model and simulation result <\/td>\n<\/tr>\n | ||||||
15<\/td>\n | Figure 9 \u2013 Preparation for the test setup <\/td>\n<\/tr>\n | ||||||
16<\/td>\n | Figure 10 \u2013 Test procedure flow <\/td>\n<\/tr>\n | ||||||
17<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Device embedded substrate – Guidelines. Electrical testing<\/b><\/p>\n |