{"id":410479,"date":"2024-10-20T05:40:36","date_gmt":"2024-10-20T05:40:36","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-en-iec-62680-1-22022\/"},"modified":"2024-10-26T10:26:54","modified_gmt":"2024-10-26T10:26:54","slug":"bs-en-iec-62680-1-22022","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-en-iec-62680-1-22022\/","title":{"rendered":"BS EN IEC 62680-1-2:2022"},"content":{"rendered":"

IEC 62680-1-2:2022 specification defines a power delivery system covering all elements of a USB system including: Hosts, Devices, Hubs, Chargers and cable assemblies. This specification describes the architecture, protocols, power supply behavior, connectors and cabling necessary for managing power delivery over USB at up to 100W. This specification is intended to be fully compatible and extend the existing USB infrastructure. It is intended that this specification will allow system OEMs, power supply and peripheral developers adequate flexibility for product versatility and market differentiation without losing backwards compatibility. This sixt edition cancels and replaces the fifth edition published in 2021 and constitutes a technical revision. Extended Power Range (EPR) including Adjustable Voltage Supply (AVS) has been added. This docuemnt is the USB-IF publication Universal Serial Bus Power Delivery Specification Revision 3.1, Version 1.1.<\/p>\n

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PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
2<\/td>\nundefined <\/td>\n<\/tr>\n
4<\/td>\nEuropean foreword
Endorsement notice <\/td>\n<\/tr>\n
5<\/td>\nFOREWORD <\/td>\n<\/tr>\n
7<\/td>\nINTRODUCTION <\/td>\n<\/tr>\n
18<\/td>\nEnglish
Table of Contents <\/td>\n<\/tr>\n
54<\/td>\n1 Introduction
1.1 Overview <\/td>\n<\/tr>\n
55<\/td>\n1.2 Purpose
1.3 Scope <\/td>\n<\/tr>\n
56<\/td>\n1.4 Conventions
1.4.1 Precedence
1.4.2 Keywords <\/td>\n<\/tr>\n
57<\/td>\n1.4.3 Numbering
1.5 Related Documents <\/td>\n<\/tr>\n
58<\/td>\n1.6 Terms and Abbreviations
Tables
Table 11 Terms and Abbreviations <\/td>\n<\/tr>\n
66<\/td>\n1.7 Parameter Values <\/td>\n<\/tr>\n
67<\/td>\n1.8 Changes from Revision 3.0
1.9 Compatibility with Revision 2.0
2 Overview
2.1 Introduction <\/td>\n<\/tr>\n
68<\/td>\n2.2 Section Overview <\/td>\n<\/tr>\n
69<\/td>\n2.3 Compatibility with Revision 2.0
2.4 USB Power Delivery Capable Devices
Figures
Figure 21 Logical Structure of USB Power Delivery Capable Devices <\/td>\n<\/tr>\n
70<\/td>\n2.5 SOP* Communication
2.5.1 Introduction
2.5.2 SOP* Collision Avoidance
2.5.3 SOP Communication
2.5.4 SOP\u2019\/SOP\u2019\u2019 Communication with Cable Plugs <\/td>\n<\/tr>\n
71<\/td>\nFigure 22 Example SOP\u2019 Communication between Vconn Source and Cable Plug(s) <\/td>\n<\/tr>\n
72<\/td>\n2.6 Operational Overview
2.6.1 Source Operation <\/td>\n<\/tr>\n
75<\/td>\n2.6.2 Sink Operation <\/td>\n<\/tr>\n
77<\/td>\n2.6.3 Cable Plugs <\/td>\n<\/tr>\n
78<\/td>\n2.7 Architectural Overview
Figure 23 USB Power Delivery Communications Stack <\/td>\n<\/tr>\n
79<\/td>\nFigure 24 USB Power Delivery Communication Over USB <\/td>\n<\/tr>\n
80<\/td>\n2.7.1 Policy
Figure 25 High Level Architecture View <\/td>\n<\/tr>\n
81<\/td>\n2.7.2 Message Formation and Transmission
2.7.3 Collision Avoidance <\/td>\n<\/tr>\n
82<\/td>\n2.7.4 Power supply
2.7.5 DFP\/UFP <\/td>\n<\/tr>\n
83<\/td>\n2.7.6 Cable and Connectors
2.7.7 Interactions between Non-PD, BC and PD devices
2.7.8 Power Rules
2.8 Extended Power Range (EPR) Operation <\/td>\n<\/tr>\n
85<\/td>\n2.9 Charging Models
2.9.1 Fixed Voltage Charging Models
Figure 26 Example of a Normal EPR Mode Operational Flow
Table 21 Fixed Voltage Power Ranges <\/td>\n<\/tr>\n
86<\/td>\n2.9.2 Programmable Power Supply (PPS) Charging Models
2.9.3 Adjustable Voltage Supply (AVS) Charging Models
3 USB Type-A and USB Type-B Cable Assemblies and Connectors
4 Electrical Requirements
4.1 Interoperability with other USB Specifications
Table 22 PPS Voltage Power Ranges
Table 23 EPR Adjustable Voltage Supply Voltage Ranges <\/td>\n<\/tr>\n
87<\/td>\n4.2 Dead Battery Detection \/ Unpowered Port Detection
4.3 Cable IR Ground Drop (IR Drop)
4.4 Cable Type Detection
5 Physical Layer
5.1 Physical Layer Overview
5.2 Physical Layer Functions <\/td>\n<\/tr>\n
89<\/td>\n5.3 Symbol Encoding
Table 51 4b5b Symbol Encoding Table <\/td>\n<\/tr>\n
90<\/td>\n5.4 Ordered Sets
Figure 51 Interpretation of ordered sets
Table 52 Ordered Sets.
Table 53 Validation of Ordered Sets <\/td>\n<\/tr>\n
91<\/td>\n5.5 Transmitted Bit Ordering
Figure 52 Transmit Order for Various Sizes of Data
Table 54 Data Size <\/td>\n<\/tr>\n
92<\/td>\n5.6 Packet Format
5.6.1 Packet Framing
Figure 53 USB Power Delivery Packet Format
Table 55 SOP ordered set. <\/td>\n<\/tr>\n
93<\/td>\nTable 56 SOP\u2019 ordered set.
Table 57 SOP\u2019\u2019 ordered set. <\/td>\n<\/tr>\n
94<\/td>\n5.6.2 CRC
Table 58 SOP\u2019_Debug ordered set.
Table 59 SOP\u2019\u2019_Debug ordered set. <\/td>\n<\/tr>\n
95<\/td>\nFigure 54 CRC 32 generation
Table 510 CRC-32 Mapping <\/td>\n<\/tr>\n
96<\/td>\n5.6.3 Packet Detection Errors
5.6.4 Hard Reset
Table 511 Hard Reset ordered set. <\/td>\n<\/tr>\n
97<\/td>\n5.6.5 Cable Reset
5.7 Collision Avoidance
Figure 55 Line format of Hard Reset
Figure 56 Line format of Cable Reset
Table 512 Cable Reset ordered set. <\/td>\n<\/tr>\n
98<\/td>\n5.8 Biphase Mark Coding (BMC) Signaling Scheme
5.8.1 Encoding and signaling
Figure 57 BMC Example
Table 513 Rp values used for Collision Avoidance. <\/td>\n<\/tr>\n
99<\/td>\nFigure 58 BMC Transmitter Block Diagram
Figure 59 BMC Receiver Block Diagram
Figure 510 BMC Encoded Start of Preamble <\/td>\n<\/tr>\n
100<\/td>\nFigure 511 Transmitting or Receiving BMC Encoded Frame Terminated by Zero with High-to-Low Last Transition
Figure 512 Transmitting or Receiving BMC Encoded Frame Terminated by One with High-to-Low Last Transition <\/td>\n<\/tr>\n
101<\/td>\n5.8.2 Transmit and Receive Masks
Figure 513 Transmitting or Receiving BMC Encoded Frame Terminated by Zero with Low to High Last Transition
Figure 514 Transmitting or Receiving BMC Encoded Frame Terminated by One with Low to High Last Transition <\/td>\n<\/tr>\n
102<\/td>\nFigure 515 BMC Tx \u2018ONE\u2019 Mask
Figure 516 BMC Tx \u2018ZERO\u2019 Mask
Table 514 BMC Tx Mask Definition, X Values <\/td>\n<\/tr>\n
103<\/td>\nTable 515 BMC Tx Mask Definition, Y Values <\/td>\n<\/tr>\n
104<\/td>\nFigure 517 BMC Rx \u2018ONE\u2019 Mask when Sourcing Power <\/td>\n<\/tr>\n
105<\/td>\nFigure 518 BMC Rx \u2018ZERO\u2019 Mask when Sourcing Power
Figure 519 BMC Rx \u2018ONE\u2019 Mask when Power neutral <\/td>\n<\/tr>\n
106<\/td>\nFigure 520 BMC Rx \u2018ZERO\u2019 Mask when Power neutral
Figure 521 BMC Rx \u2018ONE\u2019 Mask when Sinking Power. <\/td>\n<\/tr>\n
107<\/td>\n5.8.3 Transmitter Load Model
Figure 522 BMC Rx \u2018ZERO\u2019 Mask when Sinking Power.
Table 516 BMC Rx Mask Definition <\/td>\n<\/tr>\n
108<\/td>\n5.8.4 BMC Common specifications
Figure 523 Transmitter Load Model for BMC Tx from a Source
Figure 524 Transmitter Load Model for BMC Tx from a Sink <\/td>\n<\/tr>\n
109<\/td>\n5.8.5 BMC Transmitter Specifications
Table 517 BMC Common Normative Requirements
Table 518 BMC Transmitter Normative Requirements <\/td>\n<\/tr>\n
110<\/td>\nFigure 525 Transmitter diagram illustrating zDriver <\/td>\n<\/tr>\n
111<\/td>\nFigure 526 Inter-Frame Gap Timings <\/td>\n<\/tr>\n
112<\/td>\n5.8.6 BMC Receiver Specifications
Table 519 BMC Receiver Normative Requirements <\/td>\n<\/tr>\n
113<\/td>\nFigure 527 Example Multi-Drop Configuration showing two DRPs
Figure 528 Example Multi-Drop Configuration showing a DFP and UFP <\/td>\n<\/tr>\n
115<\/td>\n5.9 Built in Self-Test (BIST)
5.9.1 BIST Carrier Mode
5.9.2 BIST Test Data
6 Protocol Layer
6.1 Overview
6.2 Messages
Figure 529 Test Data Frame <\/td>\n<\/tr>\n
116<\/td>\n6.2.1 Message Construction
Figure 61 USB Power Delivery Packet Format including Control Message Payload
Figure 62 USB Power Delivery Packet Format including Data Message Payload <\/td>\n<\/tr>\n
117<\/td>\nFigure 63 USB Power Delivery Packet Format including an Extended Message Header and Payload
Table 61 Message Header <\/td>\n<\/tr>\n
120<\/td>\nTable 62 Revision Interoperability during an Explicit Contract <\/td>\n<\/tr>\n
121<\/td>\nTable 63 Extended Message Header <\/td>\n<\/tr>\n
123<\/td>\nFigure 64 Example Security_Request sequence Unchunked (Chunked bit = 0)
Figure 65 Example byte transmission for Security_Request Message of Data Size 7 (Chunked bit is set to 0)
Table 64 Use of Unchunked Message Supported bit <\/td>\n<\/tr>\n
124<\/td>\nFigure 66 Example byte transmission for Security_Response Message of Data Size 7 (Chunked bit is set to 0) <\/td>\n<\/tr>\n
125<\/td>\nFigure 67 Example Security_Request sequence Chunked (Chunked bit = 1)
Figure 68 Example Security_Request Message of Data Size 7 (Chunked bit set to 1) <\/td>\n<\/tr>\n
126<\/td>\nFigure 69 Example Chunk 0 of Security_Response Message of Data Size 30 (Chunked bit set to 1)
Figure 610 Example byte transmission for a Security_Response Message Chunk request (Chunked bit is set to 1) <\/td>\n<\/tr>\n
127<\/td>\n6.3 Control Message
Figure 611 Example Chunk 1 of Security_Response Message of Data Size 30 (Chunked bit set to 1)
Table 65 Control Message Types <\/td>\n<\/tr>\n
128<\/td>\n6.3.1 GoodCRC Message
6.3.2 GotoMin Message
6.3.3 Accept Message <\/td>\n<\/tr>\n
129<\/td>\n6.3.4 Reject Message
6.3.5 Ping Message
6.3.6 PS_RDY Message
6.3.7 Get_Source_Cap Message
6.3.8 Get_Sink_Cap Message <\/td>\n<\/tr>\n
130<\/td>\n6.3.9 DR_Swap Message
6.3.10 PR_Swap Message <\/td>\n<\/tr>\n
131<\/td>\n6.3.11 VCONN_Swap Message
6.3.12 Wait Message <\/td>\n<\/tr>\n
133<\/td>\n6.3.13 Soft Reset Message
6.3.14 Data_Reset Message <\/td>\n<\/tr>\n
134<\/td>\n6.3.15 Data_Reset_Complete Message
6.3.16 Not_Supported Message
6.3.17 Get_Source_Cap_Extended Message
6.3.18 Get_Status Message
6.3.19 FR_Swap Message <\/td>\n<\/tr>\n
135<\/td>\n6.3.20 Get_PPS_Status
6.3.21 Get_Country_Codes
6.3.22 Get_Sink_Cap_Extended Message
6.3.23 Get_Source_Info Message
6.3.24 Get_Revision Message
6.4 Data Message <\/td>\n<\/tr>\n
136<\/td>\n6.4.1 Capabilities Message
Table 66 Data Message Types <\/td>\n<\/tr>\n
137<\/td>\nFigure 612 Example Capabilities Message with 2 Power Data Objects
Table 67 Power Data Object <\/td>\n<\/tr>\n
138<\/td>\nTable 68 Augmented Power Data Object <\/td>\n<\/tr>\n
140<\/td>\nTable 69 Fixed Supply PDO – Source <\/td>\n<\/tr>\n
142<\/td>\nTable 610 Fixed Power Source Peak Current Capability
Table 611 Variable Supply (non-Battery) PDO – Source <\/td>\n<\/tr>\n
143<\/td>\nTable 612 Battery Supply PDO – Source
Table 613 SPR Programmable Power Supply APDO – Source <\/td>\n<\/tr>\n
144<\/td>\nTable 614 EPR Adjustable Voltage Supply APDO \u2013 Source
Table 615 Fixed Supply PDO – Sink <\/td>\n<\/tr>\n
146<\/td>\nTable 616 Variable Supply (non-Battery) PDO – Sink
Table 617 Battery Supply PDO – Sink <\/td>\n<\/tr>\n
147<\/td>\n6.4.2 Request Message
Table 618 Programmable Power Supply APDO – Sink
Table 619 EPR Adjustable Voltage Supply APDO – Sink <\/td>\n<\/tr>\n
148<\/td>\nTable 620 Fixed and Variable Request Data Object
Table 621 Fixed and Variable Request Data Object with GiveBack Support
Table 622 Battery Request Data Object
Table 623 Battery Request Data Object with GiveBack Support <\/td>\n<\/tr>\n
149<\/td>\nTable 624 Programmable Request Data Object
Table 625 AVS Request Data Object <\/td>\n<\/tr>\n
152<\/td>\n6.4.3 BIST Message
Figure 613 BIST Message <\/td>\n<\/tr>\n
153<\/td>\nTable 626 BIST Data Object <\/td>\n<\/tr>\n
155<\/td>\n6.4.4 Vendor Defined Message
Figure 614 Vendor Defined Message <\/td>\n<\/tr>\n
156<\/td>\nTable 627 Unstructured VDM Header <\/td>\n<\/tr>\n
157<\/td>\nTable 628 Structured VDM Header <\/td>\n<\/tr>\n
158<\/td>\nTable 629 Structured VDM Commands
Table 630 SVID Values <\/td>\n<\/tr>\n
160<\/td>\nTable 631 Commands and Responses <\/td>\n<\/tr>\n
161<\/td>\nFigure 615 Discover Identity Command response
Figure 616 Discover Identity Command response for a DRD <\/td>\n<\/tr>\n
162<\/td>\nTable 632 ID Header VDO <\/td>\n<\/tr>\n
163<\/td>\nTable 633 Product Types (UFP)
Table 634 Product Types (Cable Plug\/VPD) <\/td>\n<\/tr>\n
164<\/td>\nTable 635 Product Types (DFP)
Table 636 Cert Stat VDO
Table 637 Product VDO <\/td>\n<\/tr>\n
165<\/td>\nTable 638 UFP VDO <\/td>\n<\/tr>\n
166<\/td>\nTable 639 DFP VDO <\/td>\n<\/tr>\n
167<\/td>\nTable 640 Passive Cable VDO <\/td>\n<\/tr>\n
169<\/td>\nTable 641 Active Cable VDO 1 <\/td>\n<\/tr>\n
172<\/td>\nTable 642 Active Cable VDO 2 <\/td>\n<\/tr>\n
174<\/td>\nTable 643 VPD VDO <\/td>\n<\/tr>\n
175<\/td>\nTable 644 Discover SVIDs Responder VDO <\/td>\n<\/tr>\n
176<\/td>\nFigure 617 Example Discover SVIDs response with 3 SVIDs
Figure 618 Example Discover SVIDs response with 4 SVIDs
Figure 619 Example Discover SVIDs response with 12 SVIDs followed by an empty response <\/td>\n<\/tr>\n
177<\/td>\nFigure 620 Example Discover Modes response for a given SVID with 3 Modes <\/td>\n<\/tr>\n
178<\/td>\nFigure 621 Successful Enter Mode sequence
Figure 622 Enter Mode sequence Interrupted by Source Capabilities and then Re-run <\/td>\n<\/tr>\n
179<\/td>\nFigure 623 Unsuccessful Enter Mode sequence due to NAK <\/td>\n<\/tr>\n
180<\/td>\nFigure 624 Exit Mode sequence
Figure 625 Attention Command request\/response sequence <\/td>\n<\/tr>\n
181<\/td>\nFigure 626 Command request\/response sequence <\/td>\n<\/tr>\n
182<\/td>\nFigure 627 Enter\/Exit Mode Process <\/td>\n<\/tr>\n
183<\/td>\n6.4.5 Battery_Status Message
Figure 628 Battery_Status Message
Table 645 Battery Status Data Object (BSDO) <\/td>\n<\/tr>\n
184<\/td>\n6.4.6 Alert Message
Figure 629 Alert Message
Table 646 Alert Data Object <\/td>\n<\/tr>\n
186<\/td>\n6.4.7 Get_Country_Info Message <\/td>\n<\/tr>\n
187<\/td>\n6.4.8 Enter_USB Message
Figure 630 Get_Country_Info Message
Figure 631 Enter_USB Message
Table 647 Country Code Data Object
Table 648 Enter_USB Data Object <\/td>\n<\/tr>\n
189<\/td>\n6.4.9 EPR_Request Message
6.4.10 EPR_Mode Message
Figure 632 EPR_Request Message <\/td>\n<\/tr>\n
190<\/td>\nFigure 633 EPR Mode DO Message
Table 649 EPR Mode Data Object (EPRMDO) <\/td>\n<\/tr>\n
191<\/td>\nFigure 634 Illustration of process to enter EPR Mode <\/td>\n<\/tr>\n
194<\/td>\n6.4.11 Source_Info Message
Figure 635 Source_Info Message
Table 650 Source_Info Data Object (SIDO) <\/td>\n<\/tr>\n
195<\/td>\n6.4.12 Revision Message
6.5 Extended Message
Figure 636 Revision Message Data Object
Table 651 Revision Message Data Object (RMDO) <\/td>\n<\/tr>\n
196<\/td>\n6.5.1 Source_Capabilities_Extended Message
Table 652 Extended Message Types <\/td>\n<\/tr>\n
197<\/td>\nFigure 637 Source_Capabilities_Extended Message
Table 653 Source Capabilities Extended Data Block (SCEDB) <\/td>\n<\/tr>\n
201<\/td>\n6.5.2 Status Message
Figure 638 SOP Status Message
Table 654 SOP Status Data Block (SDB) <\/td>\n<\/tr>\n
205<\/td>\n6.5.3 Get_Battery_Cap Message
Figure 639 SOP\u2019\/SOP\u2019\u2019 Status Message
Figure 640 Get_Battery_Cap Message
Table 655 SOP\u2019\/SOP\u2019\u2019 Status Data Block (SDB)
Table 656 Get Battery Cap Data Block (GBCDB) <\/td>\n<\/tr>\n
206<\/td>\n6.5.4 Get_Battery_Status Message
6.5.5 Battery_Capabilities Message
Figure 641 Get_Battery_Status Message
Figure 642 Battery_Capabilities Message
Table 657 Get Battery Status Data Block (GBSDB)
Table 658 Battery Capability Data Block (BCDB) <\/td>\n<\/tr>\n
207<\/td>\n6.5.6 Get_Manufacturer_Info Message
Figure 643 Get_Manufacturer_Info Message
Table 659 Get Manufacturer Info Data Block (GMIDB) <\/td>\n<\/tr>\n
208<\/td>\n6.5.7 Manufacturer_Info Message
Figure 644 Manufacturer_Info Message
Table 660 Manufacturer Info Data Block (MIDB) <\/td>\n<\/tr>\n
209<\/td>\n6.5.8 Security Messages
Figure 645 Security_Request Message
Figure 646 Security_Response Message <\/td>\n<\/tr>\n
210<\/td>\n6.5.9 Firmware Update Messages
6.5.10 PPS_Status Message
Figure 647 Firmware_Update_Request Message
Figure 648 Firmware_Update_Response Message
Figure 649 PPS_Status Message
Table 661 PPS Status Data Block (PPSSDB) <\/td>\n<\/tr>\n
211<\/td>\n6.5.11 Country_Codes Message <\/td>\n<\/tr>\n
212<\/td>\n6.5.12 Country_Info Message
Figure 650 Country_Codes Message
Figure 651 Country_Info Message
Table 662 Country Codes Data Block (CCDB)
Table 663 Country Info Data Block (CIDB) <\/td>\n<\/tr>\n
213<\/td>\n6.5.13 Sink_Capabilities_Extended Message
Figure 652 Sink_Capabilities_Extended Message
Table 664 Sink Capabilities Extended Data Block (SKEDB) <\/td>\n<\/tr>\n
217<\/td>\n6.5.14 Extended_Control Message
Figure 653 Extended_Control Message
Table 665 Extended Control Data Block (SDB)
Table 666 Extended Control Message Types <\/td>\n<\/tr>\n
218<\/td>\n6.5.15 EPR Capabilities Message
Figure 654 Mapping SPR Capabilities to EPR Capabilities <\/td>\n<\/tr>\n
219<\/td>\n6.5.16 Vendor_Defined_Extended Message <\/td>\n<\/tr>\n
220<\/td>\n6.6 Timers
6.6.1 CRCReceiveTimer
Figure 655 Vendor_Defined_Extended Message <\/td>\n<\/tr>\n
221<\/td>\n6.6.2 SenderResponseTimer
6.6.3 Capability Timers <\/td>\n<\/tr>\n
222<\/td>\n6.6.4 Wait Timers and Times <\/td>\n<\/tr>\n
223<\/td>\n6.6.5 Power Supply Timers <\/td>\n<\/tr>\n
224<\/td>\n6.6.6 NoResponseTimer <\/td>\n<\/tr>\n
225<\/td>\n6.6.7 BIST Timers
6.6.8 Power Role Swap Timers
6.6.9 Soft Reset Timers
6.6.10 Data Reset Timers <\/td>\n<\/tr>\n
226<\/td>\n6.6.11 Hard Reset Timers <\/td>\n<\/tr>\n
227<\/td>\n6.6.12 Structured VDM Timers <\/td>\n<\/tr>\n
228<\/td>\n6.6.13 Vconn Timers
6.6.14 tCableMessage
6.6.15 DiscoverIdentityTimer
6.6.16 Collision Avoidance Timers <\/td>\n<\/tr>\n
229<\/td>\n6.6.17 Fast Role Swap Timers
6.6.18 Chunking Timers <\/td>\n<\/tr>\n
230<\/td>\n6.6.19 Programmable Power Supply Timers
6.6.20 tEnterUSB <\/td>\n<\/tr>\n
231<\/td>\n6.6.21 EPR Timers
6.6.22 Time Values and Timers <\/td>\n<\/tr>\n
232<\/td>\nTable 667 Time Values <\/td>\n<\/tr>\n
233<\/td>\nTable 668 Timers <\/td>\n<\/tr>\n
235<\/td>\n6.7 Counters
6.7.1 MessageID Counter
6.7.2 Retry Counter <\/td>\n<\/tr>\n
236<\/td>\n6.7.3 Hard Reset Counter
6.7.4 Capabilities Counter
6.7.5 Discover Identity Counter
6.7.6 VDMBusyCounter
6.7.7 Counter Values and Counters
Table 669 Counter parameters <\/td>\n<\/tr>\n
237<\/td>\n6.8 Reset
6.8.1 Soft Reset and Protocol Error
Table 670 Counters
Table 671 and <\/td>\n<\/tr>\n
238<\/td>\nTable 671 Response to an incoming Message (except VDM) <\/td>\n<\/tr>\n
239<\/td>\n6.8.2 Data Reset
6.8.3 Hard Reset
Table 672 Response to an incoming VDM <\/td>\n<\/tr>\n
240<\/td>\n6.8.4 Cable Reset
6.9 Collision Avoidance
6.10 Message Discarding <\/td>\n<\/tr>\n
241<\/td>\nTable 673 Message discarding <\/td>\n<\/tr>\n
242<\/td>\n6.11 State behavior
6.11.1 Introduction to state diagrams used in Chapter 6
6.11.2 State Operation
Figure 656 Outline of States
Figure 657 References to states <\/td>\n<\/tr>\n
243<\/td>\nFigure 658 Chunking architecture Showing Message and Control Flow <\/td>\n<\/tr>\n
245<\/td>\nFigure 659 Chunked Rx State Diagram <\/td>\n<\/tr>\n
248<\/td>\nFigure 660 Chunked Tx State Diagram <\/td>\n<\/tr>\n
252<\/td>\nFigure 661 Chunked Message Router State Diagram <\/td>\n<\/tr>\n
254<\/td>\nFigure 662 Common Protocol Layer Message Transmission State Diagram <\/td>\n<\/tr>\n
257<\/td>\nFigure 663 Source Protocol Layer Message Transmission State Diagram <\/td>\n<\/tr>\n
258<\/td>\nFigure 664 Sink Protocol Layer Message Transmission State Diagram <\/td>\n<\/tr>\n
260<\/td>\nFigure 665 Protocol layer Message reception <\/td>\n<\/tr>\n
262<\/td>\nFigure 666 Hard\/Cable Reset <\/td>\n<\/tr>\n
265<\/td>\n6.11.3 List of Protocol Layer States
Table 674 Protocol Layer States <\/td>\n<\/tr>\n
267<\/td>\n6.12 Message Applicability <\/td>\n<\/tr>\n
268<\/td>\n6.12.1 Applicability of Control Messages
Table 675 Applicability of Control Messages <\/td>\n<\/tr>\n
269<\/td>\n6.12.2 Applicability of Data Messages
Table 676 Applicability of Data Messages <\/td>\n<\/tr>\n
270<\/td>\n6.12.3 Applicability of Extended Messages
Table 677 Applicability of Extended Messages <\/td>\n<\/tr>\n
272<\/td>\n6.12.4 Applicability of Extended Control Messages
6.12.5 Applicability of Structured VDM Commands
Table 678 Applicability of Extended Control Messages
Table 679 Applicability of Structured VDM Commands <\/td>\n<\/tr>\n
273<\/td>\n6.12.6 Applicability of Reset Signaling
6.12.7 Applicability of Fast Role Swap signal
Table 680 Applicability of Reset Signaling <\/td>\n<\/tr>\n
274<\/td>\nTable 681 Applicability of Fast Role Swap signal <\/td>\n<\/tr>\n
275<\/td>\n6.13 Value Parameters
7 Power Supply
7.1 Source Requirements
7.1.1 Behavioral Aspects
7.1.2 Source Bulk Capacitance
Table 682 Value Parameters <\/td>\n<\/tr>\n
276<\/td>\n7.1.3 Types of Sources
7.1.4 Source Transitions
Figure 71 Placement of Source Bulk Capacitance <\/td>\n<\/tr>\n
277<\/td>\nFigure 72 Transition Envelope for Positive Voltage Transitions <\/td>\n<\/tr>\n
278<\/td>\nFigure 73 Transition Envelope for Negative Voltage Transitions <\/td>\n<\/tr>\n
279<\/td>\nFigure 74 PPS Positive Voltage Transitions <\/td>\n<\/tr>\n
280<\/td>\nFigure 75 PPS Negative Voltage Transitions
Figure 76 Expected PPS Ripple Relative to an LSB <\/td>\n<\/tr>\n
282<\/td>\nFigure 77 SPR PPS Programmable Voltage and Current Limit <\/td>\n<\/tr>\n
283<\/td>\nFigure 78 iPpsCLOperatingDetail <\/td>\n<\/tr>\n
284<\/td>\nFigure 79 SPR PPS Programmable Voltage and Current Limit <\/td>\n<\/tr>\n
285<\/td>\nFigure 710 AVS Positive Voltage Transitions
Figure 711 AVS Negative Voltage Transitions <\/td>\n<\/tr>\n
286<\/td>\n7.1.5 Response to Hard Resets
Figure 712 Expected AVS Ripple Relative to an LSB <\/td>\n<\/tr>\n
287<\/td>\n7.1.6 Changing the Output Power Capability
7.1.7 Robust Source Operation
Figure 713 Source VBUS and Vconn Response to Hard Reset <\/td>\n<\/tr>\n
289<\/td>\n7.1.8 Output Voltage Tolerance and Range
Figure 714 Application of vSrcNew and vSrcValid limits after tSrcReady <\/td>\n<\/tr>\n
290<\/td>\n7.1.9 Charging and Discharging the Bulk Capacitance on VBUS
7.1.10 Swap Standby for Sources
7.1.11 Source Peak Current Operation <\/td>\n<\/tr>\n
291<\/td>\nFigure 715 Source Peak Current Overload <\/td>\n<\/tr>\n
292<\/td>\n7.1.12 Source Capabilities Extended Parameters <\/td>\n<\/tr>\n
293<\/td>\nFigure 716 Holdup Time Measurement <\/td>\n<\/tr>\n
294<\/td>\n7.1.13 Fast Role Swap
Figure 717 VBUS Power during Fast Role Swap <\/td>\n<\/tr>\n
295<\/td>\n7.1.14 Non-application of VBUS Slew Rate Limits
Figure 718 VBUS detection and timing during Fast Role Swap, initial VBUS (at new source) > vSafe5V (min).
Figure 719 VBUS detection and timing during Fast Role Swap, initial VBUS (at new source) < vSafe5V (min). <\/td>\n<\/tr>\n
296<\/td>\n7.1.15 Vconn Power Cycle
Figure 720 Data Reset UFP Vconn Power Cycle <\/td>\n<\/tr>\n
297<\/td>\n7.2 Sink Requirements
7.2.1 Behavioral Aspects
7.2.2 Sink Bulk Capacitance
Figure 721 Data Reset DFP Vconn Power Cycle <\/td>\n<\/tr>\n
298<\/td>\n7.2.3 Sink Standby
7.2.4 Suspend Power Consumption
7.2.5 Zero Negotiated Current
7.2.6 Transient Load Behavior
Figure 722 Placement of Sink Bulk Capacitance <\/td>\n<\/tr>\n
299<\/td>\n7.2.7 Swap Standby for Sinks
7.2.8 Sink Peak Current Operation
7.2.9 Robust Sink Operation <\/td>\n<\/tr>\n
301<\/td>\n7.2.10 Fast Role Swap <\/td>\n<\/tr>\n
302<\/td>\n7.3 Transitions <\/td>\n<\/tr>\n
303<\/td>\n7.3.1 Increasing the Current
Figure 723 Transition Diagram for Increasing the Current <\/td>\n<\/tr>\n
304<\/td>\nTable 71 Sequence Description for Increasing the Current <\/td>\n<\/tr>\n
305<\/td>\n7.3.2 Increasing the Voltage
Figure 724 Transition Diagram for Increasing the Voltage <\/td>\n<\/tr>\n
306<\/td>\nTable 72 Sequence Description for Increasing the Voltage <\/td>\n<\/tr>\n
307<\/td>\n7.3.3 Increasing the Voltage and Current
Figure 725 Transition Diagram for Increasing the Voltage and Current <\/td>\n<\/tr>\n
308<\/td>\nTable 73 Sequence Diagram for Increasing the Voltage and Current <\/td>\n<\/tr>\n
309<\/td>\n7.3.4 Increasing the Voltage and Decreasing the Current
Figure 726 Transition Diagram for Increasing the Voltage and Decreasing the Current <\/td>\n<\/tr>\n
310<\/td>\nTable 74 Sequence Description for Increasing the Voltage and Decreasing the Current <\/td>\n<\/tr>\n
311<\/td>\n7.3.5 Decreasing the Voltage and Increasing the Current
Figure 727 Transition Diagram for Decreasing the Voltage and Increasing the Current <\/td>\n<\/tr>\n
312<\/td>\nTable 75 Sequence Description for Decreasing the Voltage and Increasing the Current <\/td>\n<\/tr>\n
313<\/td>\n7.3.6 Decreasing the Current
Figure 728 Transition Diagram for Decreasing the Current <\/td>\n<\/tr>\n
314<\/td>\nTable 76 Sequence Description for Decreasing the Current <\/td>\n<\/tr>\n
315<\/td>\n7.3.7 Decreasing the Voltage
Figure 729 Transition Diagram for Decreasing the Voltage <\/td>\n<\/tr>\n
316<\/td>\nTable 77 Sequence Description for Decreasing the Voltage <\/td>\n<\/tr>\n
317<\/td>\n7.3.8 Decreasing the Voltage and the Current
Figure 730 Transition Diagram for Decreasing the Voltage and the Current <\/td>\n<\/tr>\n
318<\/td>\nTable 78 Sequence Description for Decreasing the Voltage and the Current <\/td>\n<\/tr>\n
319<\/td>\n7.3.9 Sink Requested Power Role Swap
Figure 731 Transition Diagram for a Sink Requested Power Role Swap <\/td>\n<\/tr>\n
320<\/td>\nTable 79 Sequence Description for a Sink Requested Power Role Swap <\/td>\n<\/tr>\n
321<\/td>\n7.3.10 Source Requested Power Role Swap
Figure 732 Transition Diagram for a Source Requested Power Role Swap <\/td>\n<\/tr>\n
322<\/td>\nTable 710 Sequence Description for a Source Requested Power Role Swap <\/td>\n<\/tr>\n
323<\/td>\n7.3.11 GotoMin Current Decrease
Figure 733 Transition Diagram for a GotoMin Current Decrease <\/td>\n<\/tr>\n
324<\/td>\nTable 711 Sequence Description for a GotoMin Current Decrease <\/td>\n<\/tr>\n
325<\/td>\n7.3.12 Source Initiated Hard Reset
Figure 734 Transition Diagram for a Source Initiated Hard Reset <\/td>\n<\/tr>\n
326<\/td>\nTable 712 Sequence Description for a Source Initiated Hard Reset <\/td>\n<\/tr>\n
327<\/td>\n7.3.13 Sink Initiated Hard Reset
Figure 735 Transition Diagram for a Sink Initiated Hard Reset <\/td>\n<\/tr>\n
328<\/td>\nTable 713 Sequence Description for a Sink Initiated Hard Reset <\/td>\n<\/tr>\n
329<\/td>\n7.3.14 No change in Current or Voltage
Figure 736 Transition Diagram for no change in Current or Voltage <\/td>\n<\/tr>\n
330<\/td>\nTable 714 Sequence Description for no change in Current or Voltage <\/td>\n<\/tr>\n
331<\/td>\n7.3.15 Fast Role Swap
Figure 737 Transition Diagram for Fast Role Swap
Table 715 Sequence Description for Fast Role Swap <\/td>\n<\/tr>\n
333<\/td>\n7.3.16 Increasing the Programmable Power Supply (PPS) Voltage
Figure 738 Transition Diagram for Increasing the Programmable Power Supply Voltage
Table 716 Sequence Description for Increasing the Programmable Power Supply Voltage <\/td>\n<\/tr>\n
335<\/td>\n7.3.17 Decreasing the Programmable Power Supply (PPS) Voltage
Figure 739 Transition Diagram for Decreasing the Programmable Power Supply Voltage
Table 717 Sequence Description for Decreasing the Programmable Power Supply Voltage <\/td>\n<\/tr>\n
337<\/td>\n7.3.18 Increasing the Adjustable Voltage Supply (AVS) Voltage
Figure 740 Transition Diagram for Increasing the Programmable Power Supply Voltage
Table 718 Sequence Description for Increasing the Adjustable Voltage Supply Voltage <\/td>\n<\/tr>\n
339<\/td>\n7.3.19 Decreasing the Adjustable Voltage Supply (AVS) Voltage
Figure 741 Transition Diagram for Decreasing the Adjustable Voltage Supply Voltage
Table 719 Sequence Description for Decreasing the Adjustable Voltage Supply Voltage <\/td>\n<\/tr>\n
341<\/td>\n7.3.20 Changing the Source PDO or APDO
Figure 742 Transition Diagram for Changing the Source PDO or APDO
Table 720 Sequence Description for Changing the Source PDO or APDO <\/td>\n<\/tr>\n
343<\/td>\n7.3.21 Increasing the Programmable Power Supply Current
Figure 743 Transition Diagram for increasing the Current in PPS mode
Table 721 Sequence Description for increasing the Current in PPS mode <\/td>\n<\/tr>\n
345<\/td>\n7.3.22 Decreasing the Programmable Power Supply Current
Figure 744 Transition Diagram for decreasing the Current in PPS mode
Table 722 Sequence Description for decreasing the Current in PPS mode <\/td>\n<\/tr>\n
347<\/td>\n7.3.23 Same Request Programmable Power Supply
Figure 745 Transition Diagram for no change in Current or Voltage in PPS mode
Table 723 Sequence Description for no change in Current or Voltage in PPS mode <\/td>\n<\/tr>\n
348<\/td>\n7.4 Electrical Parameters
7.4.1 Source Electrical Parameters
Table 724 Source Electrical Parameters <\/td>\n<\/tr>\n
354<\/td>\n7.4.2 Sink Electrical Parameters
Table 725 Sink Electrical Parameters <\/td>\n<\/tr>\n
355<\/td>\n7.4.3 Common Electrical Parameters
Table 726 Common Source\/Sink Electrical Parameters <\/td>\n<\/tr>\n
356<\/td>\n8 Device Policy
8.1 Overview
8.2 Device Policy Manager <\/td>\n<\/tr>\n
358<\/td>\n8.2.1 Capabilities
8.2.2 System Policy
8.2.3 Control of Source\/Sink
8.2.4 Cable Detection <\/td>\n<\/tr>\n
359<\/td>\n8.2.5 Managing Power Requirements <\/td>\n<\/tr>\n
361<\/td>\n8.2.6 Use of \u201cUnconstrained Power\u201d bit with Batteries and AC supplies <\/td>\n<\/tr>\n
362<\/td>\nFigure 81 Example of daisy chained displays <\/td>\n<\/tr>\n
363<\/td>\n8.2.7 Interface to the Policy Engine <\/td>\n<\/tr>\n
364<\/td>\n8.3 Policy Engine
8.3.1 Introduction
8.3.2 Atomic Message Sequence Diagrams <\/td>\n<\/tr>\n
365<\/td>\nFigure 82 Basic Message Exchange (Successful)
Table 81 Basic Message Flow <\/td>\n<\/tr>\n
366<\/td>\nFigure 83 Basic Message flow indicating possible errors
Table 82 Potential issues in Basic Message Flow <\/td>\n<\/tr>\n
367<\/td>\nFigure 84 Basic Message Flow with Bad CRC followed by a Retry
Table 83 Basic Message Flow with CRC failure <\/td>\n<\/tr>\n
369<\/td>\nTable 84 Interruptible and Non-interruptible AMS <\/td>\n<\/tr>\n
371<\/td>\nFigure 85 Successful Fixed, Variable or Battery SPR Power Negotiation
Table 85 Steps for a successful Power Negotiation <\/td>\n<\/tr>\n
374<\/td>\nFigure 86 Successful GotoMin operation
Table 86 Steps for a GotoMin Negotiation <\/td>\n<\/tr>\n
376<\/td>\nFigure 87 SPR PPS Keep Alive
Table 87 Steps for SPR PPS Keep Alive <\/td>\n<\/tr>\n
379<\/td>\nFigure 88 Entering EPR Mode (Success) <\/td>\n<\/tr>\n
380<\/td>\nTable 88 Steps for Entering EPR Mode (Success) <\/td>\n<\/tr>\n
382<\/td>\nFigure 89 Entering EPR Mode (Failure due to non-EPR cable) <\/td>\n<\/tr>\n
383<\/td>\nTable 89 Steps for Entering EPR Mode (Failure due to non-EPR cable) <\/td>\n<\/tr>\n
385<\/td>\nFigure 810 Entering EPR Mode (Failure of Vconn Swap)
Table 810 Steps for Entering EPR Mode (Failure of Vconn Swap) <\/td>\n<\/tr>\n
388<\/td>\nFigure 811 Successful Fixed EPR Power Negotiation
Table 811 Steps for a successful EPR Power Negotiation <\/td>\n<\/tr>\n
391<\/td>\nFigure 812 EPR Keep Alive
Table 812 Steps for EPR Keep Alive <\/td>\n<\/tr>\n
393<\/td>\nFigure 813 Exiting EPR Mode (Sink Initiated)
Table 813 Steps for Exiting EPR Mode (Sink Initiated) <\/td>\n<\/tr>\n
395<\/td>\nFigure 814 Exiting EPR Mode (Source Initiated)
Table 814 Steps for Exiting EPR Mode (Source Initiated) <\/td>\n<\/tr>\n
397<\/td>\nFigure 815 Soft Reset
Table 815 Steps for a Soft Reset <\/td>\n<\/tr>\n
399<\/td>\nFigure 816 DFP Initiated Data Reset where the DFP is the Vconn Source <\/td>\n<\/tr>\n
400<\/td>\nTable 816 Steps for a DFP Initiated Data Reset where the DFP is the Vconn Source <\/td>\n<\/tr>\n
402<\/td>\nFigure 817 DFP Receives Data Reset where the DFP is the Vconn Source
Table 817 Steps for a DFP Receiving a Data Reset where the DFP is the Vconn Source <\/td>\n<\/tr>\n
405<\/td>\nFigure 818 DFP Initiated Data Reset where the UFP is the Vconn Source <\/td>\n<\/tr>\n
406<\/td>\nTable 818 Steps for a DFP Initiated Data Reset where the UFP is the Vconn Source <\/td>\n<\/tr>\n
409<\/td>\nFigure 819 DFP Receives a Data Reset where the UFP is the Vconn Source <\/td>\n<\/tr>\n
410<\/td>\nTable 819 Steps for a DFP Receiving a Data Reset where the UFP is the Vconn Source <\/td>\n<\/tr>\n
413<\/td>\nFigure 820 Source initiated Hard Reset <\/td>\n<\/tr>\n
414<\/td>\nTable 820 Steps for Source initiated Hard Reset <\/td>\n<\/tr>\n
416<\/td>\nFigure 821 Sink Initiated Hard Reset <\/td>\n<\/tr>\n
417<\/td>\nTable 821 Steps for Sink initiated Hard Reset <\/td>\n<\/tr>\n
419<\/td>\nFigure 822 Source initiated reset – Sink long reset
Table 822 Steps for Source initiated Hard Reset \u2013 Sink long reset <\/td>\n<\/tr>\n
423<\/td>\nFigure 823 Successful Power Role Swap Sequence Initiated by the Source <\/td>\n<\/tr>\n
424<\/td>\nTable 823 Steps for a Successful Source Initiated Power Role Swap Sequence <\/td>\n<\/tr>\n
428<\/td>\nFigure 824 Successful Power Role Swap Sequence Initiated by the Sink <\/td>\n<\/tr>\n
429<\/td>\nTable 824 Steps for a Successful Sink Initiated Power Role Swap Sequence <\/td>\n<\/tr>\n
433<\/td>\nFigure 825 Successful Fast Role Swap Sequence <\/td>\n<\/tr>\n
434<\/td>\nTable 825 Steps for a Successful Fast Role Swap Sequence <\/td>\n<\/tr>\n
437<\/td>\nFigure 826 Data Role Swap, UFP operating as Sink initiates
Table 826 Steps for Data Role Swap, UFP operating as Sink initiates <\/td>\n<\/tr>\n
439<\/td>\nFigure 827 Data Role Swap, UFP operating as Source initiates
Table 827 Steps for Data Role Swap, UFP operating as Source initiates <\/td>\n<\/tr>\n
441<\/td>\nFigure 828 Data Role Swap, DFP operating as Source initiates
Table 828 Steps for Data Role Swap, DFP operating as Source initiates <\/td>\n<\/tr>\n
443<\/td>\nFigure 829 Data Role Swap, DFP operating as Sink initiates
Table 829 Steps for Data Role Swap, DFP operating as Sink initiates <\/td>\n<\/tr>\n
445<\/td>\nFigure 830 Source to Sink Vconn Source Swap <\/td>\n<\/tr>\n
446<\/td>\nTable 830 Steps for Source to Sink Vconn Source Swap <\/td>\n<\/tr>\n
448<\/td>\nFigure 831 Sink to Source Vconn Source Swap <\/td>\n<\/tr>\n
449<\/td>\nTable 831 Steps for Sink to Source Vconn Source Swap <\/td>\n<\/tr>\n
451<\/td>\nFigure 832 Source Alert to Sink <\/td>\n<\/tr>\n
452<\/td>\nTable 832 Steps for Source Alert to Sink <\/td>\n<\/tr>\n
453<\/td>\nFigure 833 Sink Alert to Source
Table 833 Steps for Sink Alert to Source <\/td>\n<\/tr>\n
454<\/td>\nFigure 834 Sink Gets Source Status
Table 834 Steps for a Sink getting Source Status Sequence <\/td>\n<\/tr>\n
456<\/td>\nFigure 835 Source Gets Sink Status
Table 835 Steps for a Source getting Sink Status Sequence <\/td>\n<\/tr>\n
458<\/td>\nFigure 836 Sink Gets Source PPS Status
Table 836 Steps for a Sink getting Source PPS status Sequence <\/td>\n<\/tr>\n
460<\/td>\nFigure 837 Sink Gets Source\u2019s Capabilities
Table 837 Steps for a Sink getting Source Capabilities Sequence <\/td>\n<\/tr>\n
462<\/td>\nFigure 838 Dual-Role Source Gets Dual-Role Sink\u2019s Capabilities as a Source
Table 838 Steps for a Dual-Role Source getting Dual-Role Sink\u2019s capabilities as a Source Sequence <\/td>\n<\/tr>\n
464<\/td>\nFigure 839 Source Gets Sink\u2019s Capabilities
Table 839 Steps for a Source getting Sink Capabilities Sequence <\/td>\n<\/tr>\n
466<\/td>\nFigure 840 Dual-Role Sink Gets Dual-Role Source\u2019s Capabilities as a Sink
Table 840 Steps for a Dual-Role Sink getting Dual-Role Source capabilities as a Sink Sequence <\/td>\n<\/tr>\n
468<\/td>\nFigure 841 Sink Gets Source\u2019s Extended Capabilities
Table 841 Steps for a Sink getting Source extended capabilities Sequence <\/td>\n<\/tr>\n
470<\/td>\nFigure 842 Dual-Role Source Gets Dual-Role Sink\u2019s Extended Capabilities
Table 842 Steps for a Dual-Role Source getting Dual-Role Sink extended capabilities Sequence <\/td>\n<\/tr>\n
472<\/td>\nFigure 843 Sink Gets Source\u2019s Battery Capabilities
Table 843 Steps for a Sink getting Source Battery capabilities Sequence <\/td>\n<\/tr>\n
474<\/td>\nFigure 844 Source Gets Sink\u2019s Battery Capabilities
Table 844 Steps for a Source getting Sink Battery capabilities Sequence <\/td>\n<\/tr>\n
476<\/td>\nFigure 845 Sink Gets Source\u2019s Battery Status
Table 845 Steps for a Sink getting Source Battery status Sequence <\/td>\n<\/tr>\n
478<\/td>\nFigure 846 Source Gets Sink\u2019s Battery Status
Table 846 Steps for a Source getting Sink Battery status Sequence <\/td>\n<\/tr>\n
480<\/td>\nFigure 847 Source Gets Sink\u2019s Port Manufacturer Information
Table 847 Steps for a Source getting Sink\u2019s Port Manufacturer Information Sequence <\/td>\n<\/tr>\n
482<\/td>\nFigure 848 Sink Gets Source\u2019s Port Manufacturer Information
Table 848 Steps for a Source getting Sink\u2019s Port Manufacturer Information Sequence <\/td>\n<\/tr>\n
484<\/td>\nFigure 849 Source Gets Sink\u2019s Battery Manufacturer Information
Table 849 Steps for a Source getting Sink\u2019s Battery Manufacturer Information Sequence <\/td>\n<\/tr>\n
486<\/td>\nFigure 850 Sink Gets Source\u2019s Battery Manufacturer Information
Table 850 Steps for a Source getting Sink\u2019s Battery Manufacturer Information Sequence <\/td>\n<\/tr>\n
488<\/td>\nFigure 851 Vconn Source Gets Cable Plug\u2019s Manufacturer Information
Table 851 Steps for a Vconn Source getting Sink\u2019s Port Manufacturer Information Sequence <\/td>\n<\/tr>\n
490<\/td>\nFigure 852 Source Gets Sink\u2019s Country Codes
Table 852 Steps for a Source getting Country Codes Sequence <\/td>\n<\/tr>\n
492<\/td>\nFigure 853 Sink Gets Source\u2019s Country Codes
Table 853 Steps for a Source getting Sink\u2019s Country Codes Sequence <\/td>\n<\/tr>\n
494<\/td>\nFigure 854 Vconn Source Gets Cable Plug\u2019s Country Codes
Table 854 Steps for a Vconn Source getting Sink\u2019s Country Codes Sequence <\/td>\n<\/tr>\n
496<\/td>\nFigure 855 Source Gets Sink\u2019s Country Information
Table 855 Steps for a Source getting Country Information Sequence <\/td>\n<\/tr>\n
498<\/td>\nFigure 856 Sink Gets Source\u2019s Country Information
Table 856 Steps for a Source getting Sink\u2019s Country Information Sequence <\/td>\n<\/tr>\n
500<\/td>\nFigure 857 Vconn Source Gets Cable Plug\u2019s Country Information
Table 857 Steps for a Vconn Source getting Sink\u2019s Country Information Sequence <\/td>\n<\/tr>\n
502<\/td>\nFigure 858 Source requests security exchange with Sink
Table 858 Steps for a Source requesting a security exchange with a Sink Sequence <\/td>\n<\/tr>\n
504<\/td>\nFigure 859 Sink requests security exchange with Source
Table 859 Steps for a Sink requesting a security exchange with a Source Sequence <\/td>\n<\/tr>\n
506<\/td>\nFigure 860 Vconn Source requests security exchange with Cable Plug
Table 860 Steps for a Vconn Source requesting a security exchange with a Cable Plug Sequence <\/td>\n<\/tr>\n
508<\/td>\nFigure 861 Source requests firmware update exchange with Sink
Table 861 Steps for a Source requesting a firmware update exchange with a Sink Sequence <\/td>\n<\/tr>\n
510<\/td>\nFigure 862 Sink requests firmware update exchange with Source
Table 862 Steps for a Sink requesting a firmware update exchange with a Source Sequence <\/td>\n<\/tr>\n
512<\/td>\nFigure 863 Vconn Source requests firmware update exchange with Cable Plug
Table 863 Steps for a Vconn Source requesting a firmware update exchange with a Cable Plug Sequence <\/td>\n<\/tr>\n
514<\/td>\nFigure 864 DFP to UFP Discover Identity
Table 864 Steps for DFP to UFP Discover Identity <\/td>\n<\/tr>\n
516<\/td>\nFigure 865 Source Port to Cable Plug Discover Identity
Table 865 Steps for Source Port to Cable Plug Discover Identity <\/td>\n<\/tr>\n
518<\/td>\nFigure 866 DFP to Cable Plug Discover Identity
Table 866 Steps for DFP to Cable Plug Discover Identity <\/td>\n<\/tr>\n
520<\/td>\nFigure 867 DFP to UFP Enter Mode
Table 867 Steps for DFP to UFP Enter Mode <\/td>\n<\/tr>\n
522<\/td>\nFigure 868 DFP to UFP Exit Mode
Table 868 Steps for DFP to UFP Exit Mode <\/td>\n<\/tr>\n
524<\/td>\nFigure 869 DFP to Cable Plug Enter Mode
Table 869 Steps for DFP to Cable Plug Enter Mode <\/td>\n<\/tr>\n
526<\/td>\nFigure 870 DFP to Cable Plug Exit Mode
Table 870 Steps for DFP to Cable Plug Exit Mode <\/td>\n<\/tr>\n
528<\/td>\nFigure 871 UFP to DFP Attention
Table 871 Steps for UFP to DFP Attention <\/td>\n<\/tr>\n
529<\/td>\nFigure 872 BIST Carrier Mode Test <\/td>\n<\/tr>\n
530<\/td>\nTable 872 Steps for BIST Carrier Mode Test <\/td>\n<\/tr>\n
531<\/td>\nFigure 873 BIST Test Data Test <\/td>\n<\/tr>\n
532<\/td>\nTable 873 Steps for BIST Test Data Test <\/td>\n<\/tr>\n
534<\/td>\nFigure 874 UFP Entering USB4 Mode (Valid)
Table 874 Steps for UFP USB4 Mode Entry (Valid) <\/td>\n<\/tr>\n
536<\/td>\nFigure 875 Cable Plug Entering USB4 Mode (Valid)
Table 875 Steps for Cable Plug USB4 Mode Entry (Valid) <\/td>\n<\/tr>\n
538<\/td>\nFigure 876 UFP Entering USB4 Mode (Invalid)
Table 876 Steps for UFP USB4 Mode Entry (Invalid) <\/td>\n<\/tr>\n
540<\/td>\nFigure 877 Cable Plug Entering USB4 Mode (Invalid)
Table 877 Steps for Cable Plug USB4 Mode Entry (Invalid) <\/td>\n<\/tr>\n
542<\/td>\nFigure 878 Unstructured VDM Message Sequence
Table 878 Steps for Unstructured VDM Message Sequence <\/td>\n<\/tr>\n
544<\/td>\nFigure 879 Unstructured VDEM Message Sequence
Table 879 Steps for Unstructured VDEM Message Sequence <\/td>\n<\/tr>\n
545<\/td>\n8.3.3 State Diagrams
Figure 880 Outline of States <\/td>\n<\/tr>\n
546<\/td>\nFigure 881 References to states
Figure 882 Example of state reference with conditions
Figure 883 Example of state reference with the same entry and exit <\/td>\n<\/tr>\n
548<\/td>\nFigure 884 Source Port Policy Engine State Diagram <\/td>\n<\/tr>\n
556<\/td>\nFigure 885 Sink Port State Diagram <\/td>\n<\/tr>\n
561<\/td>\nFigure 886 Source Port Soft Reset and Protocol Error State Diagram <\/td>\n<\/tr>\n
563<\/td>\nFigure 887 Sink Port Soft Reset and Protocol Error Diagram <\/td>\n<\/tr>\n
565<\/td>\nFigure 888 DFP Data_Reset Message State Diagram <\/td>\n<\/tr>\n
567<\/td>\nFigure 889 UFP Data_Reset Message State Diagram <\/td>\n<\/tr>\n
569<\/td>\nFigure 890 Source Port Not Supported Message State Diagram <\/td>\n<\/tr>\n
570<\/td>\nFigure 891 Sink Port Not Supported Message State Diagram <\/td>\n<\/tr>\n
571<\/td>\nFigure 892 Source Port Ping State Diagram
Figure 893 Source Port Source Alert State Diagram
Figure 894 Sink Port Source Alert State Diagram <\/td>\n<\/tr>\n
572<\/td>\nFigure 895 Sink Port Sink Alert State Diagram
Figure 896 Source Port Sink Alert State Diagram <\/td>\n<\/tr>\n
573<\/td>\nFigure 897 Sink Port Get Source Capabilities Extended State Diagram
Figure 898 Source Give Source Capabilities Extended State Diagram <\/td>\n<\/tr>\n
574<\/td>\nFigure 899 Sink Port Get Source Status State Diagram
Figure 8100 Source Give Source Status State Diagram <\/td>\n<\/tr>\n
575<\/td>\nFigure 8101 Source Port Get Sink Status State Diagram
Figure 8102 Sink Give Sink Status State Diagram <\/td>\n<\/tr>\n
576<\/td>\nFigure 8103 Sink Port Get Source PPS Status State Diagram
Figure 8104 Source Give Source PPS Status State Diagram <\/td>\n<\/tr>\n
577<\/td>\nFigure 8105 Get Battery Capabilities State Diagram
Figure 8106 Give Battery Capabilities State Diagram <\/td>\n<\/tr>\n
578<\/td>\nFigure 8107 Get Battery Status State Diagram
Figure 8108 Give Battery Status State Diagram <\/td>\n<\/tr>\n
579<\/td>\nFigure 8109 Get Manufacturer Information State Diagram
Figure 8110 Give Manufacturer Information State Diagram <\/td>\n<\/tr>\n
580<\/td>\nFigure 8111 Get Country Codes State Diagram
Figure 8112 Give Country Codes State Diagram <\/td>\n<\/tr>\n
581<\/td>\nFigure 8113 Get Country Information State Diagram
Figure 8114 Give Country Information State Diagram <\/td>\n<\/tr>\n
582<\/td>\nFigure 8115 DFP Enter_USB Message State Diagram
Figure 8116 UFP Enter_USB Message State Diagram <\/td>\n<\/tr>\n
583<\/td>\nFigure 8117 Send security request State Diagram
Figure 8118 Send security response State Diagram <\/td>\n<\/tr>\n
584<\/td>\nFigure 8119 Security response received State Diagram
Figure 8120 Send firmware update request State Diagram <\/td>\n<\/tr>\n
585<\/td>\nFigure 8121 Send firmware update response State Diagram
Figure 8122 Firmware update response received State Diagram <\/td>\n<\/tr>\n
586<\/td>\nFigure 8123: DFP to UFP Data Role Swap State Diagram <\/td>\n<\/tr>\n
588<\/td>\nFigure 8124: UFP to DFP Data Role Swap State Diagram <\/td>\n<\/tr>\n
590<\/td>\nFigure 8125: Dual-Role Port in Source to Sink Power Role Swap State Diagram <\/td>\n<\/tr>\n
593<\/td>\nFigure 8126: Dual-role Port in Sink to Source Power Role Swap State Diagram <\/td>\n<\/tr>\n
596<\/td>\nFigure 8127: Dual-Role Port in Source to Sink Fast Role Swap State Diagram <\/td>\n<\/tr>\n
598<\/td>\nFigure 8128: Dual-role Port in Sink to Source Fast Role Swap State Diagram <\/td>\n<\/tr>\n
600<\/td>\nFigure 8129 Dual-Role (Source) Get Source Capabilities diagram <\/td>\n<\/tr>\n
601<\/td>\nFigure 8130 Dual-Role (Source) Give Sink Capabilities diagram
Figure 8131 Dual-Role (Sink) Get Sink Capabilities State Diagram <\/td>\n<\/tr>\n
602<\/td>\nFigure 8132 Dual-Role (Sink) Give Source Capabilities State Diagram <\/td>\n<\/tr>\n
603<\/td>\nFigure 8133 Dual-Role (Source) Get Source Capabilities Extended State Diagram
Figure 8134 Dual-Role (Source) Give Sink Capabilities diagram <\/td>\n<\/tr>\n
604<\/td>\nFigure 8135 Vconn Swap State Diagram <\/td>\n<\/tr>\n
607<\/td>\nFigure 8136 Initiator to Port VDM Discover Identity State Diagram <\/td>\n<\/tr>\n
608<\/td>\nFigure 8137 Initiator VDM Discover SVIDs State Diagram <\/td>\n<\/tr>\n
609<\/td>\nFigure 8138 Initiator VDM Discover Modes State Diagram <\/td>\n<\/tr>\n
610<\/td>\nFigure 8139 Initiator VDM Attention State Diagram <\/td>\n<\/tr>\n
611<\/td>\nFigure 8140 Responder Structured VDM Discover Identity State Diagram <\/td>\n<\/tr>\n
612<\/td>\nFigure 8141 Responder Structured VDM Discover SVIDs State Diagram <\/td>\n<\/tr>\n
613<\/td>\nFigure 8142 Responder Structured VDM Discover Modes State Diagram <\/td>\n<\/tr>\n
614<\/td>\nFigure 8143 Receiving a Structured VDM Attention State Diagram
Figure 8144 DFP VDM Mode Entry State Diagram <\/td>\n<\/tr>\n
616<\/td>\nFigure 8145 DFP VDM Mode Exit State Diagram <\/td>\n<\/tr>\n
617<\/td>\nFigure 8146 UFP Structured VDM Enter Mode State Diagram <\/td>\n<\/tr>\n
618<\/td>\nFigure 8147 UFP Structured VDM Exit Mode State Diagram <\/td>\n<\/tr>\n
619<\/td>\nFigure 8148 Cable Ready VDM State Diagram
Figure 8149 Cable Plug Soft Reset State Diagram <\/td>\n<\/tr>\n
620<\/td>\nFigure 8150 Cable Plug Hard Reset State Diagram <\/td>\n<\/tr>\n
621<\/td>\nFigure 8151 DFP\/Vconn Source Soft Reset or Cable Reset of a Cable Plug or VPD State Diagram <\/td>\n<\/tr>\n
622<\/td>\nFigure 8152 UFP\/Vconn Source Soft Reset of a Cable Plug or VPD State Diagram <\/td>\n<\/tr>\n
623<\/td>\nFigure 8153 Source Startup Structured VDM Discover Identity State Diagram <\/td>\n<\/tr>\n
625<\/td>\nFigure 8154 Cable Plug Structured VDM Enter Mode State Diagram <\/td>\n<\/tr>\n
626<\/td>\nFigure 8155 Cable Plug Structured VDM Exit Mode State Diagram <\/td>\n<\/tr>\n
627<\/td>\nFigure 8156 Source EPR Mode Entry State Diagram <\/td>\n<\/tr>\n
629<\/td>\nFigure 8157 Sink EPR Mode Entry State Diagram <\/td>\n<\/tr>\n
630<\/td>\nFigure 8158 Source EPR Mode Exit State Diagram <\/td>\n<\/tr>\n
631<\/td>\nFigure 8159 Sink EPR Mode Exit State Diagram <\/td>\n<\/tr>\n
632<\/td>\nFigure 8160 BIST Carrier Mode State Diagram <\/td>\n<\/tr>\n
633<\/td>\nTable 880 Policy Engine States <\/td>\n<\/tr>\n
639<\/td>\n9 States and Status Reporting
9.1 Overview <\/td>\n<\/tr>\n
640<\/td>\nFigure 91 Example PD Topology <\/td>\n<\/tr>\n
641<\/td>\n9.1.1 PDUSB Device and Hub Requirements
9.1.2 Mapping to USB Device States
Figure 92 Mapping of PD Topology to USB <\/td>\n<\/tr>\n
642<\/td>\nFigure 93 USB Attached to USB Powered State Transition <\/td>\n<\/tr>\n
643<\/td>\nFigure 94 Any USB State to USB Attached State Transition (When operating as a Consumer)
Figure 95 Any USB State to USB Attached State Transition (When operating as a Provider) <\/td>\n<\/tr>\n
644<\/td>\n9.1.3 PD Software Stack
9.1.4 PDUSB Device Enumeration
Figure 96 Any USB State to USB Attached State Transition (After a USB Type-C Data Role Swap)
Figure 97 Software stack on a PD aware OS <\/td>\n<\/tr>\n
645<\/td>\nFigure 98 Enumeration of a PDUSB Device <\/td>\n<\/tr>\n
646<\/td>\n9.2 PD Specific Descriptors
9.2.1 USB Power Delivery Capability Descriptor
Table 91 USB Power Delivery Type Codes
Table 92 USB Power Delivery Capability Descriptor <\/td>\n<\/tr>\n
647<\/td>\n9.2.2 Battery Info Capability Descriptor
Table 93 Battery Info Capability Descriptor <\/td>\n<\/tr>\n
648<\/td>\n9.2.3 PD Consumer Port Capability Descriptor
9.2.4 PD Provider Port Capability Descriptor
Table 94 PD Consumer Port Descriptor <\/td>\n<\/tr>\n
649<\/td>\n9.3 PD Specific Requests and Events
9.3.1 PD Specific Requests
Table 95 PD Provider Port Descriptor
Table 96 PD Requests
Table 97 PD Request Codes <\/td>\n<\/tr>\n
650<\/td>\n9.4 PDUSB Hub and PDUSB Peripheral Device Requests
9.4.1 GetBatteryStatus
Table 98 PD Feature Selectors
Table 99 Battery Status Structure <\/td>\n<\/tr>\n
651<\/td>\n9.4.2 SetPDFeature <\/td>\n<\/tr>\n
652<\/td>\nTable 910 Battery Wake Mask
Table 911 Charging Policy Encoding <\/td>\n<\/tr>\n
653<\/td>\n10 Power Rules
10.1 Introduction
10.2 Source Power Rules
10.2.1 Source Power Rule Considerations
Table 101 Considerations for Sources <\/td>\n<\/tr>\n
654<\/td>\n10.2.2 Normative Voltages and Currents
Table 102 SPR Normative Voltages and Minimum Currents <\/td>\n<\/tr>\n
655<\/td>\nFigure 101 SPR Source Power Rule Illustration
Figure 102 SPR Source Power Rule Example <\/td>\n<\/tr>\n
656<\/td>\nTable 103 Fixed Supply PDO \u2013 Source 5V
Table 104 Fixed Supply PDO \u2013 Source 9V
Table 105 Fixed Supply PDO \u2013 Source 15V
Table 106 Fixed Supply PDO \u2013 Source 20V <\/td>\n<\/tr>\n
657<\/td>\n10.2.3 Optional Voltages\/Currents
Table 107 SPR Programmable Power Supply PDOs and APDOs based on the PDP <\/td>\n<\/tr>\n
658<\/td>\nTable 108 SPR Programmable Power Supply Voltage Ranges <\/td>\n<\/tr>\n
660<\/td>\nTable 109 EPR Source Capabilities based in the Port\u2019s PDP <\/td>\n<\/tr>\n
661<\/td>\nTable 1010 EPR Source Capabilities based on a Shared Port\u2019s Equivalent PDP <\/td>\n<\/tr>\n
662<\/td>\nFigure 103 Valid EPR AVS Operating Region
Table 1011 EPR Source Equivalent PDP Examples <\/td>\n<\/tr>\n
663<\/td>\n10.2.4 Power sharing between ports
10.3 Sink Power Rules
10.3.1 Sink Power Rule Considerations
10.3.2 Normative Sink Rules
Table 1012 EPR Adjustable Voltage Supply (AVS) Voltage Ranges <\/td>\n<\/tr>\n
664<\/td>\nA. CRC calculation
A.1 C code example <\/td>\n<\/tr>\n
666<\/td>\nA.2 Table showing the full calculation over one Message <\/td>\n<\/tr>\n
667<\/td>\nB. PD Message Sequence Examples
B.1 External power is supplied downstream
Figure B1 External Power supplied downstream <\/td>\n<\/tr>\n
668<\/td>\nTable B1 External power is supplied downstream <\/td>\n<\/tr>\n
670<\/td>\nB.2 External power is supplied upstream <\/td>\n<\/tr>\n
671<\/td>\nFigure B2 External Power supplied upstream
Table B2 External power is supplied upstream <\/td>\n<\/tr>\n
677<\/td>\nB.3 Giving back power
Figure B3 Giving Back Power
Table B3 Giving back power. <\/td>\n<\/tr>\n
687<\/td>\nC. VDM Command Examples
C.1 Discover Identity Example
C.1.1 Discover Identity Command request
C.1.2 Discover Identity Command response \u2013 Active Cable.
Table C1 Discover Identity Command request from Initiator Example. <\/td>\n<\/tr>\n
688<\/td>\nTable C2 Discover Identity Command response from Active Cable Responder Example <\/td>\n<\/tr>\n
689<\/td>\nC.1.3 Discover Identity Command response \u2013 Hub.
Table C3 Discover Identity Command response from Hub Responder Example <\/td>\n<\/tr>\n
690<\/td>\nC.2 Discover SVIDs Example
C.2.1 Discover SVIDs Command request
C.2.2 Discover SVIDs Command response
Table C4 Discover SVIDs Command request from Initiator Example.
Table C5 Discover SVIDs Command response from Responder Example. <\/td>\n<\/tr>\n
692<\/td>\nC.3 Discover Modes Example
C.3.1 Discover Modes Command request
C.3.2 Discover Modes Command response
Table C6 Discover Modes Command request from Initiator Example.
Table C7 Discover Modes Command response from Responder Example. <\/td>\n<\/tr>\n
694<\/td>\nC.4 Enter Mode Example
C.4.1 Enter Mode Command request
C.4.2 Enter Mode Command response
Table C8 Enter Mode Command request from Initiator Example.
Table C9 Enter Mode Command response from Responder Example. <\/td>\n<\/tr>\n
695<\/td>\nC.4.3 Enter Mode Command request with additional VDO.
Table C10 Enter Mode Command request from Initiator Example. <\/td>\n<\/tr>\n
696<\/td>\nC.5 Exit Mode Example
C.5.1 Exit Mode Command request
C.5.2 Exit Mode Command response
Table C11 Exit Mode Command request from Initiator Example.
Table C12 Exit Mode Command response from Responder Example. <\/td>\n<\/tr>\n
697<\/td>\nC.6 Attention Example
C.6.1 Attention Command request
C.6.2 Attention Command request with additional VDO.
Table C13 Attention Command request from Initiator Example <\/td>\n<\/tr>\n
698<\/td>\nD. BMC Receiver Design Examples
D.1 Finite Difference Scheme
D.1.1 Sample Circuitry
D.1.2 Theory
Figure D1 Circuit Block of BMC Finite Difference Receiver
Table C14 Attention Command request from Initiator with additional VDO Example <\/td>\n<\/tr>\n
699<\/td>\nFigure D2 BMC AC and DC noise from VBUS at Power Sink <\/td>\n<\/tr>\n
700<\/td>\nFigure D3 Sample BMC Signals (a) without [USB 2.0] SE0 Noise (b) with [USB 2.0] SE0 Noise
Figure D4 Scaled BMC Signal Derivative with 50ns Sampling Rate. <\/td>\n<\/tr>\n
701<\/td>\nD.1.3 Data Recovery
D.1.4 Noise Zone and Detection Zone
Figure D5 BMC Signal and Finite Difference Output with Various Time Steps
Figure D6 Output of Finite Difference in dash line and Edge Detector in solid line <\/td>\n<\/tr>\n
702<\/td>\nD.2 Subtraction Scheme
D.2.1 Sample Circuitry
D.2.2 Output of Each Circuit Block
Figure D7 Noise Zone and Detect Zone of BMC Receiver
Figure D8 Circuit Block of BMC Subtraction Receiver <\/td>\n<\/tr>\n
703<\/td>\nD.2.3 Subtractor Output at Power Source and Power Sink
Figure D9 (a) Output of LPF1 and LPF2 (b) Subtraction of LPF1 and LPF2 Output
Figure D10 Output of the BMC LPF1 in blue dash curve and the Subtractor in red solid curve <\/td>\n<\/tr>\n
704<\/td>\nD.2.4 Noise Zone and Detection Zone
E. FRS System Level Example
E.1 Overview
Figure E1 Example FRS Capable System <\/td>\n<\/tr>\n
705<\/td>\nFigure E2 Slow VBUS Discharge <\/td>\n<\/tr>\n
706<\/td>\nE.2 FRS Initial Setup
Figure E3 Fast VBUS Discharge
Table E1: Sequence Table for setup of a Fast Role Swap (Hub connected to Power Adapter first) <\/td>\n<\/tr>\n
707<\/td>\nTable E2 Sequence Table for setup of a Fast Role Swap (Hub connected to Notebook before Power Adapter) <\/td>\n<\/tr>\n
708<\/td>\nE.3 FRS Process <\/td>\n<\/tr>\n
709<\/td>\nFigure E4 Sequence Diagram for slow Vbus discharge (it discharges after FR_Swap message is sent)
Table E3 Sequence Table for slow Vbus discharge (it discharges after FR_Swap message is sent) <\/td>\n<\/tr>\n
710<\/td>\nFigure E-5: Sequence for Vbus discharges quickly (before FR_Swap message is sent) after adapter disconnected. <\/td>\n<\/tr>\n
711<\/td>\nTable E4 Vbus discharges quickly after adapter disconnected. <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

Universal serial bus interfaces for data and power – Common components. USB Power Delivery specification<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
BSI<\/b><\/a><\/td>\n2022<\/td>\n712<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":410489,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2641],"product_tag":[],"class_list":{"0":"post-410479","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-bsi","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/410479","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/410489"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=410479"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=410479"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=410479"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}